SMC_SIslands_MCArbDramTimingRegisterSet 4759 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						SMC_SIslands_MCArbDramTimingRegisterSet *arb_regs)
SMC_SIslands_MCArbDramTimingRegisterSet 4789 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };
SMC_SIslands_MCArbDramTimingRegisterSet 4799 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						  sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * (first_arb_set + i),
SMC_SIslands_MCArbDramTimingRegisterSet 4801 drivers/gpu/drm/amd/amdgpu/si_dpm.c 						  sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),
SMC_SIslands_MCArbDramTimingRegisterSet 5128 drivers/gpu/drm/amd/amdgpu/si_dpm.c 	SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };
SMC_SIslands_MCArbDramTimingRegisterSet 5142 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					  sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * SISLANDS_ULV_STATE_ARB_INDEX,
SMC_SIslands_MCArbDramTimingRegisterSet 5144 drivers/gpu/drm/amd/amdgpu/si_dpm.c 					  sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),
SMC_SIslands_MCArbDramTimingRegisterSet  337 drivers/gpu/drm/amd/amdgpu/sislands_smc.h typedef struct SMC_SIslands_MCArbDramTimingRegisterSet SMC_SIslands_MCArbDramTimingRegisterSet;
SMC_SIslands_MCArbDramTimingRegisterSet  343 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     SMC_SIslands_MCArbDramTimingRegisterSet     data[16];
SMC_SIslands_MCArbDramTimingRegisterSet 4295 drivers/gpu/drm/radeon/si_dpm.c 						SMC_SIslands_MCArbDramTimingRegisterSet *arb_regs)
SMC_SIslands_MCArbDramTimingRegisterSet 4325 drivers/gpu/drm/radeon/si_dpm.c 	SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };
SMC_SIslands_MCArbDramTimingRegisterSet 4335 drivers/gpu/drm/radeon/si_dpm.c 					   sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * (first_arb_set + i),
SMC_SIslands_MCArbDramTimingRegisterSet 4337 drivers/gpu/drm/radeon/si_dpm.c 					   sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),
SMC_SIslands_MCArbDramTimingRegisterSet 4665 drivers/gpu/drm/radeon/si_dpm.c 	SMC_SIslands_MCArbDramTimingRegisterSet arb_regs = { 0 };
SMC_SIslands_MCArbDramTimingRegisterSet 4679 drivers/gpu/drm/radeon/si_dpm.c 				   sizeof(SMC_SIslands_MCArbDramTimingRegisterSet) * SISLANDS_ULV_STATE_ARB_INDEX,
SMC_SIslands_MCArbDramTimingRegisterSet 4681 drivers/gpu/drm/radeon/si_dpm.c 				   sizeof(SMC_SIslands_MCArbDramTimingRegisterSet),
SMC_SIslands_MCArbDramTimingRegisterSet  337 drivers/gpu/drm/radeon/sislands_smc.h typedef struct SMC_SIslands_MCArbDramTimingRegisterSet SMC_SIslands_MCArbDramTimingRegisterSet;
SMC_SIslands_MCArbDramTimingRegisterSet  343 drivers/gpu/drm/radeon/sislands_smc.h     SMC_SIslands_MCArbDramTimingRegisterSet     data[16];