SMC_RESP_0       4082 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (RREG32(SMC_RESP_0) == 1)
SMC_RESP_0        176 drivers/gpu/drm/amd/amdgpu/si_smc.c 		tmp = RREG32(SMC_RESP_0);
SMC_RESP_0        182 drivers/gpu/drm/amd/amdgpu/si_smc.c 	return (PPSMC_Result)RREG32(SMC_RESP_0);
SMC_RESP_0        215 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
SMC_RESP_0        217 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c 	ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);
SMC_RESP_0        142 drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c 	PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
SMC_RESP_0        170 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
SMC_RESP_0        172 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);
SMC_RESP_0        182 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
SMC_RESP_0        184 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);
SMC_RESP_0        203 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
SMC_RESP_0        223 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
SMC_RESP_0        225 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 	if (1 != PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP))
SMC_RESP_0       1668 drivers/gpu/drm/radeon/ci_dpm.c 		tmp = RREG32(SMC_RESP_0);
SMC_RESP_0       1673 drivers/gpu/drm/radeon/ci_dpm.c 	tmp = RREG32(SMC_RESP_0);
SMC_RESP_0       1945 drivers/gpu/drm/radeon/ci_dpm.c 		if (RREG32(SMC_RESP_0) == 1)
SMC_RESP_0         37 drivers/gpu/drm/radeon/kv_smc.c 		if ((RREG32(SMC_RESP_0) & SMC_RESP_MASK) != 0)
SMC_RESP_0         41 drivers/gpu/drm/radeon/kv_smc.c 	tmp = RREG32(SMC_RESP_0) & SMC_RESP_MASK;
SMC_RESP_0       3622 drivers/gpu/drm/radeon/si_dpm.c 		if (RREG32(SMC_RESP_0) == 1)
SMC_RESP_0        183 drivers/gpu/drm/radeon/si_smc.c 		tmp = RREG32(SMC_RESP_0);
SMC_RESP_0        188 drivers/gpu/drm/radeon/si_smc.c 	tmp = RREG32(SMC_RESP_0);
SMC_RESP_0         36 drivers/gpu/drm/radeon/trinity_smc.c 		if (RREG32(SMC_RESP_0) != 0)
SMC_RESP_0         40 drivers/gpu/drm/radeon/trinity_smc.c 	v = RREG32(SMC_RESP_0);