SMC_NIslands_MCRegisterSet  304 drivers/gpu/drm/amd/amdgpu/si_dpm.h typedef struct SMC_NIslands_MCRegisterSet SMC_NIslands_MCRegisterSet;
SMC_NIslands_MCRegisterSet  324 drivers/gpu/drm/amd/amdgpu/si_dpm.h     SMC_NIslands_MCRegisterSet          data[SMC_NISLANDS_MC_REGISTER_ARRAY_SET_COUNT];
SMC_NIslands_MCRegisterSet 2944 drivers/gpu/drm/radeon/ni_dpm.c 				    SMC_NIslands_MCRegisterSet *data,
SMC_NIslands_MCRegisterSet 2959 drivers/gpu/drm/radeon/ni_dpm.c 						 SMC_NIslands_MCRegisterSet *mc_reg_table_data)
SMC_NIslands_MCRegisterSet 3042 drivers/gpu/drm/radeon/ni_dpm.c 				       sizeof(SMC_NIslands_MCRegisterSet) * ni_new_state->performance_level_count,
SMC_NIslands_MCRegisterSet  266 drivers/gpu/drm/radeon/nislands_smc.h typedef struct SMC_NIslands_MCRegisterSet SMC_NIslands_MCRegisterSet;
SMC_NIslands_MCRegisterSet  273 drivers/gpu/drm/radeon/nislands_smc.h     SMC_NIslands_MCRegisterSet          data[SMC_NISLANDS_MC_REGISTER_ARRAY_SET_COUNT];