SMC_IND_DATA_0 961 drivers/gpu/drm/amd/amdgpu/si.c r = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 972 drivers/gpu/drm/amd/amdgpu/si.c WREG32(SMC_IND_DATA_0, (v)); SMC_IND_DATA_0 71 drivers/gpu/drm/amd/amdgpu/si_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 86 drivers/gpu/drm/amd/amdgpu/si_smc.c original_data = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 102 drivers/gpu/drm/amd/amdgpu/si_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 234 drivers/gpu/drm/amd/amdgpu/si_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 254 drivers/gpu/drm/amd/amdgpu/si_smc.c *value = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 269 drivers/gpu/drm/amd/amdgpu/si_smc.c WREG32(SMC_IND_DATA_0, value); SMC_IND_DATA_0 73 drivers/gpu/drm/radeon/ci_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 88 drivers/gpu/drm/radeon/ci_smc.c original_data = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 105 drivers/gpu/drm/radeon/ci_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 235 drivers/gpu/drm/radeon/ci_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 255 drivers/gpu/drm/radeon/ci_smc.c *value = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 270 drivers/gpu/drm/radeon/ci_smc.c WREG32(SMC_IND_DATA_0, value); SMC_IND_DATA_0 97 drivers/gpu/drm/radeon/kv_smc.c *value = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 138 drivers/gpu/drm/radeon/kv_smc.c original_data = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 164 drivers/gpu/drm/radeon/kv_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 177 drivers/gpu/drm/radeon/kv_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 192 drivers/gpu/drm/radeon/kv_smc.c original_data= RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 210 drivers/gpu/drm/radeon/kv_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 71 drivers/gpu/drm/radeon/si_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 86 drivers/gpu/drm/radeon/si_smc.c original_data = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 104 drivers/gpu/drm/radeon/si_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 271 drivers/gpu/drm/radeon/si_smc.c WREG32(SMC_IND_DATA_0, data); SMC_IND_DATA_0 291 drivers/gpu/drm/radeon/si_smc.c *value = RREG32(SMC_IND_DATA_0); SMC_IND_DATA_0 306 drivers/gpu/drm/radeon/si_smc.c WREG32(SMC_IND_DATA_0, value);