SMC_IND_ACCESS_CNTL 42 drivers/gpu/drm/amd/amdgpu/si_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 229 drivers/gpu/drm/amd/amdgpu/si_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 239 drivers/gpu/drm/amd/amdgpu/si_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 104 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); SMC_IND_ACCESS_CNTL 2332 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 1); SMC_IND_ACCESS_CNTL 2339 drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); SMC_IND_ACCESS_CNTL 167 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 1); SMC_IND_ACCESS_CNTL 176 drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, 0); SMC_IND_ACCESS_CNTL 44 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0); /* on ci, SMC_IND_ACCESS_CNTL is different */ SMC_IND_ACCESS_CNTL 468 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 1); SMC_IND_ACCESS_CNTL 473 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0); SMC_IND_ACCESS_CNTL 42 drivers/gpu/drm/radeon/ci_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 230 drivers/gpu/drm/radeon/ci_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 240 drivers/gpu/drm/radeon/ci_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 83 drivers/gpu/drm/radeon/kv_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 42 drivers/gpu/drm/radeon/si_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 266 drivers/gpu/drm/radeon/si_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_0, ~AUTO_INCREMENT_IND_0); SMC_IND_ACCESS_CNTL 276 drivers/gpu/drm/radeon/si_smc.c WREG32_P(SMC_IND_ACCESS_CNTL, 0, ~AUTO_INCREMENT_IND_0);