SKL_PS_WIN_SZ    3919 drivers/gpu/drm/i915/display/intel_display.c 	I915_WRITE(SKL_PS_WIN_SZ(intel_crtc->pipe, id), 0);
SKL_PS_WIN_SZ    5644 drivers/gpu/drm/i915/display/intel_display.c 		I915_WRITE(SKL_PS_WIN_SZ(pipe, id), crtc_state->pch_pfit.size);
SKL_PS_WIN_SZ    9777 drivers/gpu/drm/i915/display/intel_display.c 			pipe_config->pch_pfit.size = I915_READ(SKL_PS_WIN_SZ(crtc->pipe, i));
SKL_PS_WIN_SZ     408 drivers/gpu/drm/i915/display/intel_sprite.c 	I915_WRITE_FW(SKL_PS_WIN_SZ(pipe, scaler_id), (crtc_w << 16) | crtc_h);
SKL_PS_WIN_SZ    2915 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_A, 0), D_SKL_PLUS, NULL, pf_write);
SKL_PS_WIN_SZ    2916 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_A, 1), D_SKL_PLUS, NULL, pf_write);
SKL_PS_WIN_SZ    2917 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_B, 0), D_SKL_PLUS, NULL, pf_write);
SKL_PS_WIN_SZ    2918 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_B, 1), D_SKL_PLUS, NULL, pf_write);
SKL_PS_WIN_SZ    2919 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_C, 0), D_SKL_PLUS, NULL, pf_write);
SKL_PS_WIN_SZ    2920 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(SKL_PS_WIN_SZ(PIPE_C, 1), D_SKL_PLUS, NULL, pf_write);