SKL_DPLL1         967 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 		.cfgcr1 = DPLL_CFGCR1(SKL_DPLL1),
SKL_DPLL1         968 drivers/gpu/drm/i915/display/intel_dpll_mgr.c 		.cfgcr2 = DPLL_CFGCR2(SKL_DPLL1),
SKL_DPLL1        9729 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR1(id)	_MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR1, _DPLL2_CFGCR1)
SKL_DPLL1        9730 drivers/gpu/drm/i915/i915_reg.h #define DPLL_CFGCR2(id)	_MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR2, _DPLL2_CFGCR2)