SKL_ADSP_REG_CL_SD_CTL 34 sound/soc/intel/skylake/skl-sst-cldma.c SKL_ADSP_REG_CL_SD_CTL, SKL_ADSP_REG_CL_SD_CTL 41 sound/soc/intel/skylake/skl-sst-cldma.c val = sst_dsp_shim_read(ctx, SKL_ADSP_REG_CL_SD_CTL) & SKL_ADSP_REG_CL_SD_CTL 59 sound/soc/intel/skylake/skl-sst-cldma.c sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, SKL_ADSP_REG_CL_SD_CTL 61 sound/soc/intel/skylake/skl-sst-cldma.c sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, SKL_ADSP_REG_CL_SD_CTL 63 sound/soc/intel/skylake/skl-sst-cldma.c sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, SKL_ADSP_REG_CL_SD_CTL 65 sound/soc/intel/skylake/skl-sst-cldma.c sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, SKL_ADSP_REG_CL_SD_CTL 118 sound/soc/intel/skylake/skl-sst-cldma.c sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, SKL_ADSP_REG_CL_SD_CTL 120 sound/soc/intel/skylake/skl-sst-cldma.c sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, SKL_ADSP_REG_CL_SD_CTL 122 sound/soc/intel/skylake/skl-sst-cldma.c sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL, SKL_ADSP_REG_CL_SD_CTL 124 sound/soc/intel/skylake/skl-sst-cldma.c sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_CL_SD_CTL,