BB 157 arch/powerpc/xmon/ppc-opc.c #define BBA BB + 1 BB 4379 arch/powerpc/xmon/ppc-opc.c {"crnor", XL(19,33), XL_MASK, COM, PPCVLE, {BT, BA, BB}}, BB 4390 arch/powerpc/xmon/ppc-opc.c {"crandc", XL(19,129), XL_MASK, COM, PPCVLE, {BT, BA, BB}}, BB 4398 arch/powerpc/xmon/ppc-opc.c {"crxor", XL(19,193), XL_MASK, COM, PPCVLE, {BT, BA, BB}}, BB 4402 arch/powerpc/xmon/ppc-opc.c {"crnand", XL(19,225), XL_MASK, COM, PPCVLE, {BT, BA, BB}}, BB 4404 arch/powerpc/xmon/ppc-opc.c {"crand", XL(19,257), XL_MASK, COM, PPCVLE, {BT, BA, BB}}, BB 4409 arch/powerpc/xmon/ppc-opc.c {"creqv", XL(19,289), XL_MASK, COM, PPCVLE, {BT, BA, BB}}, BB 4416 arch/powerpc/xmon/ppc-opc.c {"crorc", XL(19,417), XL_MASK, COM, PPCVLE, {BT, BA, BB}}, BB 4421 arch/powerpc/xmon/ppc-opc.c {"cror", XL(19,449), XL_MASK, COM, PPCVLE, {BT, BA, BB}}, BB 7148 arch/powerpc/xmon/ppc-opc.c {"e_crandc", XL(31,129), XL_MASK, PPCVLE, 0, {BT, BA, BB}}, BB 7149 arch/powerpc/xmon/ppc-opc.c {"e_crnand", XL(31,225), XL_MASK, PPCVLE, 0, {BT, BA, BB}}, BB 7151 arch/powerpc/xmon/ppc-opc.c {"e_crnor", XL(31,33), XL_MASK, PPCVLE, 0, {BT, BA, BB}}, BB 7153 arch/powerpc/xmon/ppc-opc.c {"e_crxor", XL(31,193), XL_MASK, PPCVLE, 0, {BT, BA, BB}}, BB 7158 arch/powerpc/xmon/ppc-opc.c {"e_crand", XL(31,257), XL_MASK, PPCVLE, 0, {BT, BA, BB}}, BB 7164 arch/powerpc/xmon/ppc-opc.c {"e_creqv", XL(31,289), XL_MASK, PPCVLE, 0, {BT, BA, BB}}, BB 7169 arch/powerpc/xmon/ppc-opc.c {"e_crorc", XL(31,417), XL_MASK, PPCVLE, 0, {BT, BA, BB}}, BB 7172 arch/powerpc/xmon/ppc-opc.c {"e_cror", XL(31,449), XL_MASK, PPCVLE, 0, {BT, BA, BB}}, BB 80 arch/x86/events/intel/p4.c P4_ESCR_EMASK_BIT(P4_EVENT_TC_DELIVER_MODE, BB) | BB 559 drivers/gpio/gpio-tegra186.c TEGRA186_MAIN_GPIO_PORT(BB, 0x2600, 2, 2), BB 649 drivers/gpio/gpio-tegra186.c TEGRA194_AON_GPIO_PORT(BB, 0x0800, 4, 0),