SISLANDS_MAX_NO_VREG_STEPS 4433 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
SISLANDS_MAX_NO_VREG_STEPS 4435 drivers/gpu/drm/amd/amdgpu/si_dpm.c 								 SISLANDS_MAX_NO_VREG_STEPS,
SISLANDS_MAX_NO_VREG_STEPS 4453 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
SISLANDS_MAX_NO_VREG_STEPS 4455 drivers/gpu/drm/amd/amdgpu/si_dpm.c 								 SISLANDS_MAX_NO_VREG_STEPS,
SISLANDS_MAX_NO_VREG_STEPS 4480 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		if (si_pi->mvdd_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
SISLANDS_MAX_NO_VREG_STEPS 4482 drivers/gpu/drm/amd/amdgpu/si_dpm.c 								 SISLANDS_MAX_NO_VREG_STEPS,
SISLANDS_MAX_NO_VREG_STEPS 4493 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		    (si_pi->vddc_phase_shed_table.count > SISLANDS_MAX_NO_VREG_STEPS))
SISLANDS_MAX_NO_VREG_STEPS  215 drivers/gpu/drm/amd/amdgpu/sislands_smc.h     uint32_t                            lowSMIO[SISLANDS_MAX_NO_VREG_STEPS];
SISLANDS_MAX_NO_VREG_STEPS 3971 drivers/gpu/drm/radeon/si_dpm.c 		if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
SISLANDS_MAX_NO_VREG_STEPS 3973 drivers/gpu/drm/radeon/si_dpm.c 								 SISLANDS_MAX_NO_VREG_STEPS,
SISLANDS_MAX_NO_VREG_STEPS 3991 drivers/gpu/drm/radeon/si_dpm.c 		if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
SISLANDS_MAX_NO_VREG_STEPS 3993 drivers/gpu/drm/radeon/si_dpm.c 								 SISLANDS_MAX_NO_VREG_STEPS,
SISLANDS_MAX_NO_VREG_STEPS 4018 drivers/gpu/drm/radeon/si_dpm.c 		if (si_pi->mvdd_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)
SISLANDS_MAX_NO_VREG_STEPS 4020 drivers/gpu/drm/radeon/si_dpm.c 								 SISLANDS_MAX_NO_VREG_STEPS,
SISLANDS_MAX_NO_VREG_STEPS 4031 drivers/gpu/drm/radeon/si_dpm.c 		    (si_pi->vddc_phase_shed_table.count > SISLANDS_MAX_NO_VREG_STEPS))
SISLANDS_MAX_NO_VREG_STEPS  215 drivers/gpu/drm/radeon/sislands_smc.h     uint32_t                            lowSMIO[SISLANDS_MAX_NO_VREG_STEPS];