SIRFSOC_INT_RISC_MASK0 54 drivers/irqchip/irq-sirfsoc.c ct->regs.mask = SIRFSOC_INT_RISC_MASK0; SIRFSOC_INT_RISC_MASK0 81 drivers/irqchip/irq-sirfsoc.c writel_relaxed(0, base + SIRFSOC_INT_RISC_MASK0); SIRFSOC_INT_RISC_MASK0 103 drivers/irqchip/irq-sirfsoc.c sirfsoc_irq_st.mask0 = readl_relaxed(base + SIRFSOC_INT_RISC_MASK0); SIRFSOC_INT_RISC_MASK0 115 drivers/irqchip/irq-sirfsoc.c writel_relaxed(sirfsoc_irq_st.mask0, base + SIRFSOC_INT_RISC_MASK0);