SIRFSOC_GPIO_BANK_SIZE  265 drivers/pinctrl/sirf/pinctrl-sirf.c 	if (gpiospec->args[0] > SIRFSOC_GPIO_NO_OF_BANKS * SIRFSOC_GPIO_BANK_SIZE)
SIRFSOC_GPIO_BANK_SIZE  344 drivers/pinctrl/sirf/pinctrl-sirf.c 		for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
SIRFSOC_GPIO_BANK_SIZE  367 drivers/pinctrl/sirf/pinctrl-sirf.c 		for (j = 0; j < SIRFSOC_GPIO_BANK_SIZE; j++) {
SIRFSOC_GPIO_BANK_SIZE  412 drivers/pinctrl/sirf/pinctrl-sirf.c 	return &sgpio->sgpio_bank[offset / SIRFSOC_GPIO_BANK_SIZE];
SIRFSOC_GPIO_BANK_SIZE  417 drivers/pinctrl/sirf/pinctrl-sirf.c 	return offset % SIRFSOC_GPIO_BANK_SIZE;
SIRFSOC_GPIO_BANK_SIZE  465 drivers/pinctrl/sirf/pinctrl-sirf.c 	__sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE);
SIRFSOC_GPIO_BANK_SIZE  590 drivers/pinctrl/sirf/pinctrl-sirf.c 					bank->id * SIRFSOC_GPIO_BANK_SIZE));
SIRFSOC_GPIO_BANK_SIZE  811 drivers/pinctrl/sirf/pinctrl-sirf.c 	sgpio->chip.gc.ngpio = SIRFSOC_GPIO_BANK_SIZE * SIRFSOC_GPIO_NO_OF_BANKS;
SIRFSOC_GPIO_BANK_SIZE  852 drivers/pinctrl/sirf/pinctrl-sirf.c 		0, 0, SIRFSOC_GPIO_BANK_SIZE * SIRFSOC_GPIO_NO_OF_BANKS);
SIRFSOC_GPIO_BANK_SIZE   46 drivers/pinctrl/sirf/pinctrl-sirf.h 	u32 gpio_regs[SIRFSOC_GPIO_NO_OF_BANKS][SIRFSOC_GPIO_BANK_SIZE];