SIM               240 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	INTC_VECT(SIM, 0x4e0),	      INTC_VECT(SIM, 0x500),
SIM               241 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	INTC_VECT(SIM, 0x520),	      INTC_VECT(SIM, 0x540),
SIM               267 arch/sh/kernel/cpu/sh3/setup-sh7720.c 	{ 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
SIM                82 arch/sh/kernel/cpu/sh4/setup-sh7760.c 	INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
SIM               111 arch/sh/kernel/cpu/sh4/setup-sh7760.c 						 SCIF1, SCIF2, SIM, HSPI } },
SIM               375 arch/sh/kernel/cpu/sh4a/setup-sh7343.c 	INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI),
SIM               409 arch/sh/kernel/cpu/sh4a/setup-sh7343.c 	{ 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
SIM               580 arch/sh/kernel/cpu/sh4a/setup-sh7722.c 	INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
SIM               623 arch/sh/kernel/cpu/sh4a/setup-sh7722.c 	{ 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } },
SIM               881 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
SIM               882 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
SIM               973 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	    ADC1, 0, DMAC6_7, ADC0, SPI0, SIM, PECI2, PECI1,
SIM              1070 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	{ INT2PRI10, 0, 32, 8, { SPI0, SIM, PECI2, PECI1 } },
SIM               283 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
SIM               284 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
SIM               309 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	    PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,
SIM               327 arch/sh/kernel/cpu/sh4a/setup-sh7763.c 	{ 0xffd400a8, 0, 32, 8, /* INT2PRI10 */ { TPU, SIM, SIOF2, SIOF1 } },