SID_SHIFT_1T 264 arch/powerpc/include/asm/book3s/64/mmu-hash.h return SID_SHIFT_1T; SID_SHIFT_1T 445 arch/powerpc/include/asm/book3s/64/mmu-hash.h mask = (1ul << (SID_SHIFT_1T - VPN_SHIFT)) - 1; SID_SHIFT_1T 446 arch/powerpc/include/asm/book3s/64/mmu-hash.h vsid = vpn >> (SID_SHIFT_1T - VPN_SHIFT); SID_SHIFT_1T 569 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define ESID_BITS_1T (VA_BITS - (SID_SHIFT_1T + CONTEXT_BITS)) SID_SHIFT_1T 647 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define VSID_BITS_1T (VA_BITS - SID_SHIFT_1T) SID_SHIFT_1T 648 arch/powerpc/include/asm/book3s/64/mmu-hash.h #define VSID_BITS_65_1T (65 - SID_SHIFT_1T) SID_SHIFT_1T 761 arch/powerpc/include/asm/book3s/64/mmu-hash.h if (addr >= (1UL << SID_SHIFT_1T)) SID_SHIFT_1T 789 arch/powerpc/include/asm/book3s/64/mmu-hash.h vsid_bits = va_bits - SID_SHIFT_1T; SID_SHIFT_1T 791 arch/powerpc/include/asm/book3s/64/mmu-hash.h ((ea >> SID_SHIFT_1T) & ESID_BITS_1T_MASK); SID_SHIFT_1T 340 arch/powerpc/include/asm/kvm_book3s_64.h va_low ^= v >> (SID_SHIFT_1T - 16); SID_SHIFT_1T 36 arch/powerpc/include/asm/page_64.h #define GET_ESID_1T(x) (((x) >> SID_SHIFT_1T) & SID_MASK_1T) SID_SHIFT_1T 2180 arch/powerpc/kernel/process.c base = max_t(unsigned long, mm->brk, 1UL << SID_SHIFT_1T); SID_SHIFT_1T 656 arch/powerpc/kernel/setup_64.c return 1UL << SID_SHIFT_1T; SID_SHIFT_1T 79 arch/powerpc/kvm/book3s_64_mmu.c return slbe->tb ? SID_SHIFT_1T : SID_SHIFT; SID_SHIFT_1T 603 arch/powerpc/kvm/book3s_64_mmu.c gvsid <<= SID_SHIFT_1T - SID_SHIFT; SID_SHIFT_1T 604 arch/powerpc/kvm/book3s_64_mmu.c gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1); SID_SHIFT_1T 738 arch/powerpc/mm/book3s64/hash_native.c *vpn = vsid << (SID_SHIFT_1T - VPN_SHIFT) | seg_off >> VPN_SHIFT; SID_SHIFT_1T 1966 arch/powerpc/mm/book3s64/hash_utils.c 1UL << SID_SHIFT_1T); SID_SHIFT_1T 1927 arch/powerpc/platforms/pseries/lpar.c vsid_modulus = ((1UL << (va_bits - SID_SHIFT_1T)) - 1); SID_SHIFT_1T 41 drivers/misc/cxl/fault.c hash = (slb->esid >> SID_SHIFT_1T) & mask;