SH_CLK_MSTP8       93 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP77] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 7, 0), /* SCIF */
SH_CLK_MSTP8       94 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP74] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 4, 0), /* VDC */
SH_CLK_MSTP8       95 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP72] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 2, 0), /* CMT */
SH_CLK_MSTP8       96 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP60] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR6, 0, 0), /* USB */
SH_CLK_MSTP8       97 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP35] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 6, 0), /* MTU2 */
SH_CLK_MSTP8       98 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP34] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 4, 0), /* SDHI0 */
SH_CLK_MSTP8       99 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP33] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 3, 0), /* SDHI1 */
SH_CLK_MSTP8      100 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP32] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR3, 2, 0), /* ADC */
SH_CLK_MSTP8      101 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 	[MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0),	/* RTC */
SH_CLK_MSTP8      123 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP72] = SH_CLK_MSTP8(&peripheral0_clk, STBCR7, 2, 0), /* CMT */
SH_CLK_MSTP8      124 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP60] = SH_CLK_MSTP8(&peripheral1_clk, STBCR6, 0, 0), /* USB */
SH_CLK_MSTP8      125 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP47] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 7, 0), /* SCIF0 */
SH_CLK_MSTP8      126 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP46] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 6, 0), /* SCIF1 */
SH_CLK_MSTP8      127 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP45] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 5, 0), /* SCIF2 */
SH_CLK_MSTP8      128 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP44] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 4, 0), /* SCIF3 */
SH_CLK_MSTP8      129 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP43] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 3, 0), /* SCIF4 */
SH_CLK_MSTP8      130 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP42] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 2, 0), /* SCIF5 */
SH_CLK_MSTP8      131 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP41] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 1, 0), /* SCIF6 */
SH_CLK_MSTP8      132 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP40] = SH_CLK_MSTP8(&peripheral1_clk, STBCR4, 0, 0), /* SCIF7 */
SH_CLK_MSTP8      133 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP35] = SH_CLK_MSTP8(&peripheral0_clk, STBCR3, 5, 0), /* MTU2 */
SH_CLK_MSTP8      134 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP32] = SH_CLK_MSTP8(&peripheral1_clk, STBCR3, 2, 0), /* ADC */
SH_CLK_MSTP8      135 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 	[MSTP30] = SH_CLK_MSTP8(&r_clk, STBCR3, 0, 0), /* RTC */