SE_SF 119 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_INDEX, mask_sh),\ SE_SF 120 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC0_UPDATE, mask_sh),\ SE_SF 121 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC2_UPDATE, mask_sh),\ SE_SF 122 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_GENERIC_HDR, AFMT_GENERIC_HB0, mask_sh),\ SE_SF 123 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_GENERIC_HDR, AFMT_GENERIC_HB1, mask_sh),\ SE_SF 124 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_GENERIC_HDR, AFMT_GENERIC_HB2, mask_sh),\ SE_SF 125 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_GENERIC_HDR, AFMT_GENERIC_HB3, mask_sh),\ SE_SF 126 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_CONT, mask_sh),\ SE_SF 127 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_SEND, mask_sh),\ SE_SF 128 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_LINE, mask_sh),\ SE_SF 129 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_CONT, mask_sh),\ SE_SF 130 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_SEND, mask_sh),\ SE_SF 131 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_LINE, mask_sh),\ SE_SF 132 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\ SE_SF 133 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH, mask_sh),\ SE_SF 134 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_PIXEL_FORMAT, DP_DYN_RANGE, mask_sh),\ SE_SF 135 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_PIXEL_FORMAT, DP_YCBCR_RANGE, mask_sh),\ SE_SF 136 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_PACKET_GEN_VERSION, mask_sh),\ SE_SF 137 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_KEEPOUT_MODE, mask_sh),\ SE_SF 138 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, mask_sh),\ SE_SF 139 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, mask_sh),\ SE_SF 140 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\ SE_SF 141 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\ SE_SF 142 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_VBI_PACKET_CONTROL, HDMI_NULL_SEND, mask_sh),\ SE_SF 143 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, mask_sh),\ SE_SF 144 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_INFOFRAME_CONTROL0, AFMT_AUDIO_INFO_UPDATE, mask_sh),\ SE_SF 145 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, mask_sh),\ SE_SF 146 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\ SE_SF 147 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_MSE_RATE_CNTL, DP_MSE_RATE_X, mask_sh),\ SE_SF 148 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_MSE_RATE_CNTL, DP_MSE_RATE_Y, mask_sh),\ SE_SF 149 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, mask_sh),\ SE_SF 150 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_AVI_INFO3, AFMT_AVI_INFO_VERSION, mask_sh),\ SE_SF 151 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, mask_sh),\ SE_SF 152 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, mask_sh),\ SE_SF 153 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, mask_sh),\ SE_SF 154 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\ SE_SF 155 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\ SE_SF 156 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_GSP1_ENABLE, mask_sh),\ SE_SF 157 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, mask_sh),\ SE_SF 158 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, mask_sh),\ SE_SF 159 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_AVI_ENABLE, mask_sh),\ SE_SF 160 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_MPG_ENABLE, mask_sh),\ SE_SF 161 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, mask_sh),\ SE_SF 162 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, mask_sh),\ SE_SF 163 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, mask_sh),\ SE_SF 164 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_STEER_FIFO, DP_STEER_FIFO_RESET, mask_sh),\ SE_SF 165 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_VID_TIMING, DP_VID_M_N_GEN_EN, mask_sh),\ SE_SF 166 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_VID_N, DP_VID_N, mask_sh),\ SE_SF 167 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_VID_M, DP_VID_M, mask_sh),\ SE_SF 168 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, DIG_START, mask_sh),\ SE_SF 169 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, mask_sh),\ SE_SF 170 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, DIG_STEREOSYNC_GATE_EN, mask_sh),\ SE_SF 171 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT, mask_sh),\ SE_SF 172 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, mask_sh),\ SE_SF 173 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_PACKETS_PER_LINE, mask_sh),\ SE_SF 174 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_DELAY_EN, mask_sh),\ SE_SF 175 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, mask_sh),\ SE_SF 176 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_LAYOUT_OVRD, mask_sh),\ SE_SF 177 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_AUDIO_PACKET_CONTROL2, AFMT_60958_OSF_OVRD, mask_sh),\ SE_SF 178 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, mask_sh),\ SE_SF 179 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, mask_sh),\ SE_SF 180 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUDIO_PRIORITY, mask_sh),\ SE_SF 181 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\ SE_SF 182 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\ SE_SF 183 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\ SE_SF 184 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\ SE_SF 185 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_48_0, HDMI_ACR_CTS_48, mask_sh),\ SE_SF 186 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_ACR_48_1, HDMI_ACR_N_48, mask_sh),\ SE_SF 187 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_0, AFMT_60958_CS_CHANNEL_NUMBER_L, mask_sh),\ SE_SF 188 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_0, AFMT_60958_CS_CLOCK_ACCURACY, mask_sh),\ SE_SF 189 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\ SE_SF 190 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, mask_sh),\ SE_SF 191 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, mask_sh),\ SE_SF 192 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, mask_sh),\ SE_SF 193 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, mask_sh),\ SE_SF 194 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, mask_sh),\ SE_SF 195 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, mask_sh),\ SE_SF 196 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_AUD_N, DP_SEC_AUD_N, mask_sh),\ SE_SF 197 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_TIMESTAMP, DP_SEC_TIMESTAMP_MODE, mask_sh),\ SE_SF 198 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_ASP_ENABLE, mask_sh),\ SE_SF 199 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_ATP_ENABLE, mask_sh),\ SE_SF 200 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_AIP_ENABLE, mask_sh),\ SE_SF 201 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_SEC_CNTL, DP_SEC_ACM_ENABLE, mask_sh),\ SE_SF 202 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, mask_sh),\ SE_SF 203 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, DIG_SOURCE_SELECT, mask_sh) SE_SF 209 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_INDEX, mask_sh),\ SE_SF 210 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB0, mask_sh),\ SE_SF 211 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB1, mask_sh),\ SE_SF 212 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB2, mask_sh),\ SE_SF 213 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB3, mask_sh),\ SE_SF 214 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_CONT, mask_sh),\ SE_SF 215 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_SEND, mask_sh),\ SE_SF 216 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_LINE, mask_sh),\ SE_SF 217 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_CONT, mask_sh),\ SE_SF 218 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_SEND, mask_sh),\ SE_SF 219 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_LINE, mask_sh),\ SE_SF 220 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\ SE_SF 221 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH, mask_sh),\ SE_SF 222 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_PACKET_GEN_VERSION, mask_sh),\ SE_SF 223 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_KEEPOUT_MODE, mask_sh),\ SE_SF 224 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, mask_sh),\ SE_SF 225 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, mask_sh),\ SE_SF 226 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_DATA_SCRAMBLE_EN, mask_sh),\ SE_SF 227 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\ SE_SF 228 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\ SE_SF 229 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_NULL_SEND, mask_sh),\ SE_SF 230 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, mask_sh),\ SE_SF 231 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_INFOFRAME_CONTROL0, AFMT_AUDIO_INFO_UPDATE, mask_sh),\ SE_SF 232 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, mask_sh),\ SE_SF 233 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\ SE_SF 234 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSE_RATE_CNTL, DP_MSE_RATE_X, mask_sh),\ SE_SF 235 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSE_RATE_CNTL, DP_MSE_RATE_Y, mask_sh),\ SE_SF 236 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, mask_sh),\ SE_SF 237 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\ SE_SF 238 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\ SE_SF 239 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP1_ENABLE, mask_sh),\ SE_SF 240 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, mask_sh),\ SE_SF 241 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, mask_sh),\ SE_SF 242 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_MPG_ENABLE, mask_sh),\ SE_SF 243 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, mask_sh),\ SE_SF 244 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, mask_sh),\ SE_SF 245 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, mask_sh),\ SE_SF 246 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_STEER_FIFO, DP_STEER_FIFO_RESET, mask_sh),\ SE_SF 247 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_VID_TIMING, DP_VID_M_N_GEN_EN, mask_sh),\ SE_SF 248 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_VID_N, DP_VID_N, mask_sh),\ SE_SF 249 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\ SE_SF 250 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DIG_START, mask_sh),\ SE_SF 251 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT, mask_sh),\ SE_SF 252 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, mask_sh),\ SE_SF 253 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_PACKETS_PER_LINE, mask_sh),\ SE_SF 254 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_DELAY_EN, mask_sh),\ SE_SF 255 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, mask_sh),\ SE_SF 256 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_LAYOUT_OVRD, mask_sh),\ SE_SF 257 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_60958_OSF_OVRD, mask_sh),\ SE_SF 258 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, mask_sh),\ SE_SF 259 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, mask_sh),\ SE_SF 260 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUDIO_PRIORITY, mask_sh),\ SE_SF 261 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\ SE_SF 262 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\ SE_SF 263 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\ SE_SF 264 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\ SE_SF 265 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_48_0, HDMI_ACR_CTS_48, mask_sh),\ SE_SF 266 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_ACR_48_1, HDMI_ACR_N_48, mask_sh),\ SE_SF 267 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_0, AFMT_60958_CS_CHANNEL_NUMBER_L, mask_sh),\ SE_SF 268 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_0, AFMT_60958_CS_CLOCK_ACCURACY, mask_sh),\ SE_SF 269 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\ SE_SF 270 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, mask_sh),\ SE_SF 271 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, mask_sh),\ SE_SF 272 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, mask_sh),\ SE_SF 273 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, mask_sh),\ SE_SF 274 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, mask_sh),\ SE_SF 275 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, mask_sh),\ SE_SF 276 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_AUD_N, DP_SEC_AUD_N, mask_sh),\ SE_SF 277 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_TIMESTAMP, DP_SEC_TIMESTAMP_MODE, mask_sh),\ SE_SF 278 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_ASP_ENABLE, mask_sh),\ SE_SF 279 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_ATP_ENABLE, mask_sh),\ SE_SF 280 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_AIP_ENABLE, mask_sh),\ SE_SF 281 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_ACM_ENABLE, mask_sh),\ SE_SF 282 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, mask_sh),\ SE_SF 283 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, mask_sh),\ SE_SF 284 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\ SE_SF 285 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\ SE_SF 286 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, TMDS_COLOR_FORMAT, mask_sh),\ SE_SF 287 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, mask_sh),\ SE_SF 288 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DIG_STEREOSYNC_GATE_EN, mask_sh),\ SE_SF 289 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DIG_SOURCE_SELECT, mask_sh) SE_SF 296 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(TMDS_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\ SE_SF 297 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(TMDS_CNTL, TMDS_COLOR_FORMAT, mask_sh) SE_SF 301 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, mask_sh),\ SE_SF 302 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\ SE_SF 303 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_DATA_SCRAMBLE_EN, mask_sh),\ SE_SF 304 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\ SE_SF 305 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, TMDS_COLOR_FORMAT, mask_sh),\ SE_SF 306 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, mask_sh),\ SE_SF 307 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, DIG_STEREOSYNC_GATE_EN, mask_sh) SE_SF 311 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, mask_sh),\ SE_SF 312 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\ SE_SF 313 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(HDMI_CONTROL, HDMI_DATA_SCRAMBLE_EN, mask_sh),\ SE_SF 314 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\ SE_SF 315 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG_FE_CNTL, TMDS_COLOR_FORMAT, mask_sh),\ SE_SF 316 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP_VID_TIMING, DP_VID_M_DOUBLE_VALUE_EN, mask_sh) SE_SF 320 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC0_UPDATE, mask_sh),\ SE_SF 321 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC2_UPDATE, mask_sh),\ SE_SF 322 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_PIXEL_FORMAT, DP_DYN_RANGE, mask_sh),\ SE_SF 323 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_PIXEL_FORMAT, DP_YCBCR_RANGE, mask_sh),\ SE_SF 324 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_SEND, mask_sh),\ SE_SF 325 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_INFOFRAME_CONTROL0, HDMI_AVI_INFO_CONT, mask_sh),\ SE_SF 326 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_INFOFRAME_CONTROL1, HDMI_AVI_INFO_LINE, mask_sh),\ SE_SF 327 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_AVI_ENABLE, mask_sh),\ SE_SF 328 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_AVI_INFO3, AFMT_AVI_INFO_VERSION, mask_sh),\ SE_SF 329 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_VID_TIMING, DP_VID_M_DOUBLE_VALUE_EN, mask_sh) SE_SF 333 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_LOCK_STATUS, mask_sh),\ SE_SF 334 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, mask_sh),\ SE_SF 335 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, mask_sh),\ SE_SF 336 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC0_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 337 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC1_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 338 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC2_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 339 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC3_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 340 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 341 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC5_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 342 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC6_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 343 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC7_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 344 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC0_FRAME_UPDATE, mask_sh),\ SE_SF 345 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC1_FRAME_UPDATE, mask_sh),\ SE_SF 346 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC2_FRAME_UPDATE, mask_sh),\ SE_SF 347 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC3_FRAME_UPDATE, mask_sh),\ SE_SF 348 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_FRAME_UPDATE, mask_sh),\ SE_SF 349 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC5_FRAME_UPDATE, mask_sh),\ SE_SF 350 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC6_FRAME_UPDATE, mask_sh),\ SE_SF 351 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC7_FRAME_UPDATE, mask_sh),\ SE_SF 352 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP4_ENABLE, mask_sh),\ SE_SF 353 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\ SE_SF 354 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP6_ENABLE, mask_sh),\ SE_SF 355 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP7_ENABLE, mask_sh),\ SE_SF 356 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_DB_CNTL, DP_DB_DISABLE, mask_sh),\ SE_SF 357 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_COLORIMETRY, DP_MSA_MISC0, mask_sh),\ SE_SF 358 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM1, DP_MSA_HTOTAL, mask_sh),\ SE_SF 359 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM1, DP_MSA_VTOTAL, mask_sh),\ SE_SF 360 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM2, DP_MSA_HSTART, mask_sh),\ SE_SF 361 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM2, DP_MSA_VSTART, mask_sh),\ SE_SF 362 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM3, DP_MSA_HSYNCWIDTH, mask_sh),\ SE_SF 363 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM3, DP_MSA_HSYNCPOLARITY, mask_sh),\ SE_SF 364 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM3, DP_MSA_VSYNCWIDTH, mask_sh),\ SE_SF 365 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM3, DP_MSA_VSYNCPOLARITY, mask_sh),\ SE_SF 366 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM4, DP_MSA_HWIDTH, mask_sh),\ SE_SF 367 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM4, DP_MSA_VHEIGHT, mask_sh),\ SE_SF 368 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DIG0_HDMI_DB_CONTROL, HDMI_DB_DISABLE, mask_sh),\ SE_SF 369 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h SE_SF(DP0_DP_VID_TIMING, DP_VID_N_MUL, mask_sh) SE_SF 182 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_INDEX, mask_sh),\ SE_SF 183 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB0, mask_sh),\ SE_SF 184 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB1, mask_sh),\ SE_SF 185 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB2, mask_sh),\ SE_SF 186 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_GENERIC_HDR, AFMT_GENERIC_HB3, mask_sh),\ SE_SF 187 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_ENCODING, mask_sh),\ SE_SF 188 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_PIXEL_FORMAT, DP_COMPONENT_DEPTH, mask_sh),\ SE_SF 189 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_PACKET_GEN_VERSION, mask_sh),\ SE_SF 190 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_KEEPOUT_MODE, mask_sh),\ SE_SF 191 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_DEEP_COLOR_ENABLE, mask_sh),\ SE_SF 192 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_DEEP_COLOR_DEPTH, mask_sh),\ SE_SF 193 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_DATA_SCRAMBLE_EN, mask_sh),\ SE_SF 194 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_NO_EXTRA_NULL_PACKET_FILLED, mask_sh),\ SE_SF 195 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_CONT, mask_sh),\ SE_SF 196 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\ SE_SF 197 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_NULL_SEND, mask_sh),\ SE_SF 198 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_INFOFRAME_CONTROL0, HDMI_AUDIO_INFO_SEND, mask_sh),\ SE_SF 199 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_INFOFRAME_CONTROL0, AFMT_AUDIO_INFO_UPDATE, mask_sh),\ SE_SF 200 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_INFOFRAME_CONTROL1, HDMI_AUDIO_INFO_LINE, mask_sh),\ SE_SF 201 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_GC, HDMI_GC_AVMUTE, mask_sh),\ SE_SF 202 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSE_RATE_CNTL, DP_MSE_RATE_X, mask_sh),\ SE_SF 203 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSE_RATE_CNTL, DP_MSE_RATE_Y, mask_sh),\ SE_SF 204 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSE_RATE_UPDATE, DP_MSE_RATE_UPDATE_PENDING, mask_sh),\ SE_SF 205 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP0_ENABLE, mask_sh),\ SE_SF 206 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_STREAM_ENABLE, mask_sh),\ SE_SF 207 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP1_ENABLE, mask_sh),\ SE_SF 208 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP2_ENABLE, mask_sh),\ SE_SF 209 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP3_ENABLE, mask_sh),\ SE_SF 210 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_MPG_ENABLE, mask_sh),\ SE_SF 211 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL2, DP_SEC_GSP4_SEND, mask_sh),\ SE_SF 212 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL2, DP_SEC_GSP4_SEND_PENDING, mask_sh),\ SE_SF 213 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL4, DP_SEC_GSP4_LINE_NUM, mask_sh),\ SE_SF 214 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL2, DP_SEC_GSP4_SEND_ANY_LINE, mask_sh),\ SE_SF 215 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, mask_sh),\ SE_SF 216 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, mask_sh),\ SE_SF 217 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS, mask_sh),\ SE_SF 218 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_STEER_FIFO, DP_STEER_FIFO_RESET, mask_sh),\ SE_SF 219 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_VID_TIMING, DP_VID_M_N_GEN_EN, mask_sh),\ SE_SF 220 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_VID_N, DP_VID_N, mask_sh),\ SE_SF 221 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_VID_M, DP_VID_M, mask_sh),\ SE_SF 222 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DIG_START, mask_sh),\ SE_SF 223 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_SRC_CONTROL, AFMT_AUDIO_SRC_SELECT, mask_sh),\ SE_SF 224 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_CHANNEL_ENABLE, mask_sh),\ SE_SF 225 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_PACKETS_PER_LINE, mask_sh),\ SE_SF 226 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_AUDIO_PACKET_CONTROL, HDMI_AUDIO_DELAY_EN, mask_sh),\ SE_SF 227 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL, AFMT_60958_CS_UPDATE, mask_sh),\ SE_SF 228 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_AUDIO_LAYOUT_OVRD, mask_sh),\ SE_SF 229 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL2, AFMT_60958_OSF_OVRD, mask_sh),\ SE_SF 230 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUTO_SEND, mask_sh),\ SE_SF 231 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_SOURCE, mask_sh),\ SE_SF 232 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_PACKET_CONTROL, HDMI_ACR_AUDIO_PRIORITY, mask_sh),\ SE_SF 233 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_32_0, HDMI_ACR_CTS_32, mask_sh),\ SE_SF 234 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_32_1, HDMI_ACR_N_32, mask_sh),\ SE_SF 235 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_44_0, HDMI_ACR_CTS_44, mask_sh),\ SE_SF 236 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_44_1, HDMI_ACR_N_44, mask_sh),\ SE_SF 237 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_48_0, HDMI_ACR_CTS_48, mask_sh),\ SE_SF 238 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_ACR_48_1, HDMI_ACR_N_48, mask_sh),\ SE_SF 239 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_0, AFMT_60958_CS_CHANNEL_NUMBER_L, mask_sh),\ SE_SF 240 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_0, AFMT_60958_CS_CLOCK_ACCURACY, mask_sh),\ SE_SF 241 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_1, AFMT_60958_CS_CHANNEL_NUMBER_R, mask_sh),\ SE_SF 242 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_2, mask_sh),\ SE_SF 243 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_3, mask_sh),\ SE_SF 244 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_4, mask_sh),\ SE_SF 245 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_5, mask_sh),\ SE_SF 246 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_6, mask_sh),\ SE_SF 247 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_60958_2, AFMT_60958_CS_CHANNEL_NUMBER_7, mask_sh),\ SE_SF 248 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_AUD_N, DP_SEC_AUD_N, mask_sh),\ SE_SF 249 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_TIMESTAMP, DP_SEC_TIMESTAMP_MODE, mask_sh),\ SE_SF 250 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_ASP_ENABLE, mask_sh),\ SE_SF 251 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_ATP_ENABLE, mask_sh),\ SE_SF 252 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_AIP_ENABLE, mask_sh),\ SE_SF 253 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_ACM_ENABLE, mask_sh),\ SE_SF 254 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_AUDIO_PACKET_CONTROL, AFMT_AUDIO_SAMPLE_SEND, mask_sh),\ SE_SF 255 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_CNTL, AFMT_AUDIO_CLOCK_EN, mask_sh),\ SE_SF 256 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_CONTROL, HDMI_CLOCK_CHANNEL_RATE, mask_sh),\ SE_SF 257 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\ SE_SF 258 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, TMDS_COLOR_FORMAT, mask_sh),\ SE_SF 259 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DIG_STEREOSYNC_SELECT, mask_sh),\ SE_SF 260 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DIG_STEREOSYNC_GATE_EN, mask_sh),\ SE_SF 261 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_LOCK_STATUS, mask_sh),\ SE_SF 262 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT, mask_sh),\ SE_SF 263 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL, AFMT_GENERIC_CONFLICT_CLR, mask_sh),\ SE_SF 264 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC0_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 265 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC1_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 266 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC2_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 267 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC3_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 268 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 269 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_IMMEDIATE_UPDATE_PENDING, mask_sh),\ SE_SF 270 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC5_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 271 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC6_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 272 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC7_FRAME_UPDATE_PENDING, mask_sh),\ SE_SF 273 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC0_FRAME_UPDATE, mask_sh),\ SE_SF 274 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC1_FRAME_UPDATE, mask_sh),\ SE_SF 275 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC2_FRAME_UPDATE, mask_sh),\ SE_SF 276 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC3_FRAME_UPDATE, mask_sh),\ SE_SF 277 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_FRAME_UPDATE, mask_sh),\ SE_SF 278 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC4_IMMEDIATE_UPDATE, mask_sh),\ SE_SF 279 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC5_FRAME_UPDATE, mask_sh),\ SE_SF 280 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC6_FRAME_UPDATE, mask_sh),\ SE_SF 281 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_AFMT_VBI_PACKET_CONTROL1, AFMT_GENERIC7_FRAME_UPDATE, mask_sh),\ SE_SF 282 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP4_ENABLE, mask_sh),\ SE_SF 283 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP5_ENABLE, mask_sh),\ SE_SF 284 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP6_ENABLE, mask_sh),\ SE_SF 285 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL, DP_SEC_GSP7_ENABLE, mask_sh),\ SE_SF 286 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL2, DP_SEC_GSP7_PPS, mask_sh),\ SE_SF 287 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL2, DP_SEC_GSP7_SEND, mask_sh),\ SE_SF 288 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_SEC_CNTL6, DP_SEC_GSP7_LINE_NUM, mask_sh),\ SE_SF 289 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_DB_CNTL, DP_DB_DISABLE, mask_sh),\ SE_SF 290 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_COLORIMETRY, DP_MSA_MISC0, mask_sh),\ SE_SF 291 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM1, DP_MSA_HTOTAL, mask_sh),\ SE_SF 292 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM1, DP_MSA_VTOTAL, mask_sh),\ SE_SF 293 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM2, DP_MSA_HSTART, mask_sh),\ SE_SF 294 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM2, DP_MSA_VSTART, mask_sh),\ SE_SF 295 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM3, DP_MSA_HSYNCWIDTH, mask_sh),\ SE_SF 296 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM3, DP_MSA_HSYNCPOLARITY, mask_sh),\ SE_SF 297 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM3, DP_MSA_VSYNCWIDTH, mask_sh),\ SE_SF 298 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM3, DP_MSA_VSYNCPOLARITY, mask_sh),\ SE_SF 299 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM4, DP_MSA_HWIDTH, mask_sh),\ SE_SF 300 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_MSA_TIMING_PARAM4, DP_MSA_VHEIGHT, mask_sh),\ SE_SF 301 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_DB_CONTROL, HDMI_DB_DISABLE, mask_sh),\ SE_SF 302 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DP0_DP_VID_TIMING, DP_VID_N_MUL, mask_sh),\ SE_SF 303 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DIG_SOURCE_SELECT, mask_sh),\ SE_SF 304 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_DIG_CLOCK_PATTERN, DIG_CLOCK_PATTERN, mask_sh) SE_SF 311 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_CONT, mask_sh),\ SE_SF 312 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_SEND, mask_sh),\ SE_SF 313 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_LINE, mask_sh),\ SE_SF 314 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_CONT, mask_sh),\ SE_SF 315 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_SEND, mask_sh),\ SE_SF 316 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_LINE, mask_sh) SE_SF 46 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_CONT, mask_sh),\ SE_SF 47 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC0_SEND, mask_sh),\ SE_SF 48 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_CONT, mask_sh),\ SE_SF 49 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC1_SEND, mask_sh),\ SE_SF 50 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC2_CONT, mask_sh),\ SE_SF 51 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC2_SEND, mask_sh),\ SE_SF 52 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC3_CONT, mask_sh),\ SE_SF 53 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC3_SEND, mask_sh),\ SE_SF 54 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC4_CONT, mask_sh),\ SE_SF 55 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC4_SEND, mask_sh),\ SE_SF 56 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC5_CONT, mask_sh),\ SE_SF 57 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC5_SEND, mask_sh),\ SE_SF 58 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC6_CONT, mask_sh),\ SE_SF 59 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC6_SEND, mask_sh),\ SE_SF 60 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC7_CONT, mask_sh),\ SE_SF 61 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL0, HDMI_GENERIC7_SEND, mask_sh),\ SE_SF 62 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL1, HDMI_GENERIC0_LINE, mask_sh),\ SE_SF 63 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL1, HDMI_GENERIC1_LINE, mask_sh),\ SE_SF 64 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL2, HDMI_GENERIC2_LINE, mask_sh),\ SE_SF 65 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL2, HDMI_GENERIC3_LINE, mask_sh),\ SE_SF 66 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL3, HDMI_GENERIC4_LINE, mask_sh),\ SE_SF 67 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL3, HDMI_GENERIC5_LINE, mask_sh),\ SE_SF 68 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL4, HDMI_GENERIC6_LINE, mask_sh),\ SE_SF 69 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_GENERIC_PACKET_CONTROL4, HDMI_GENERIC7_LINE, mask_sh),\ SE_SF 70 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_DSC_CNTL, DP_DSC_MODE, mask_sh),\ SE_SF 71 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_DSC_CNTL, DP_DSC_SLICE_WIDTH, mask_sh),\ SE_SF 72 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_DSC_BYTES_PER_PIXEL, DP_DSC_BYTES_PER_PIXEL, mask_sh),\ SE_SF 73 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_MSA_VBID_MISC, DP_VBID6_LINE_REFERENCE, mask_sh),\ SE_SF 74 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_MSA_VBID_MISC, DP_VBID6_LINE_NUM, mask_sh),\ SE_SF 75 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_DME_CONTROL, METADATA_ENGINE_EN, mask_sh),\ SE_SF 76 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_DME_CONTROL, METADATA_HUBP_REQUESTOR_ID, mask_sh),\ SE_SF 77 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_DME_CONTROL, METADATA_STREAM_TYPE, mask_sh),\ SE_SF 78 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_SEC_METADATA_TRANSMISSION, DP_SEC_METADATA_PACKET_ENABLE, mask_sh),\ SE_SF 79 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_SEC_METADATA_TRANSMISSION, DP_SEC_METADATA_PACKET_LINE_REFERENCE, mask_sh),\ SE_SF 80 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_SEC_METADATA_TRANSMISSION, DP_SEC_METADATA_PACKET_LINE, mask_sh),\ SE_SF 81 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_METADATA_PACKET_CONTROL, HDMI_METADATA_PACKET_ENABLE, mask_sh),\ SE_SF 82 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_METADATA_PACKET_CONTROL, HDMI_METADATA_PACKET_LINE_REFERENCE, mask_sh),\ SE_SF 83 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_HDMI_METADATA_PACKET_CONTROL, HDMI_METADATA_PACKET_LINE, mask_sh),\ SE_SF 84 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DIG0_DIG_FE_CNTL, DOLBY_VISION_EN, mask_sh),\ SE_SF 85 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_PIXEL_FORMAT, DP_PIXEL_COMBINE, mask_sh),\ SE_SF 86 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h SE_SF(DP0_DP_SEC_FRAMING4, DP_SST_SDP_SPLITTING, mask_sh)