SET_VAL 17 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c *reg = SET_VAL(SB_IPFRAG, frag) | SET_VAL 18 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(SB_IPPROT, type) | SET_VAL 19 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(SB_IPVER, ver) | SET_VAL 20 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(SB_HDRLEN, len); SET_VAL 28 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c *idt_reg = SET_VAL(IDT_DSTQID, dstqid) | SET_VAL 29 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(IDT_FPSEL1, fpsel) | SET_VAL 30 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(IDT_NFPSEL1, nfpsel); SET_VAL 32 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c *idt_reg = SET_VAL(IDT_DSTQID, dstqid) | SET_VAL 33 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(IDT_FPSEL, fpsel) | SET_VAL 34 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(IDT_NFPSEL, nfpsel); SET_VAL 41 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c buf[0] = SET_VAL(CLE_DROP, dbptr->drop); SET_VAL 42 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c buf[4] = SET_VAL(CLE_FPSEL, dbptr->fpsel) | SET_VAL 43 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_NFPSEL, dbptr->nxtfpsel) | SET_VAL 44 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_DSTQIDL, dbptr->dstqid); SET_VAL 46 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c buf[5] = SET_VAL(CLE_DSTQIDH, (u32)dbptr->dstqid >> CLE_DSTQIDL_LEN) | SET_VAL 47 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_PRIORITY, dbptr->cle_priority); SET_VAL 55 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c buf[j++] = SET_VAL(CLE_TYPE, kn->node_type); SET_VAL 60 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c buf[j] = SET_VAL(CLE_KN_PRIO, key->priority) | SET_VAL 61 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_KN_RPTR, key->result_pointer); SET_VAL 63 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c data = SET_VAL(CLE_KN_PRIO, key->priority) | SET_VAL 64 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_KN_RPTR, key->result_pointer); SET_VAL 77 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c buf[j++] = SET_VAL(CLE_DN_TYPE, dn->node_type) | SET_VAL 78 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_DN_LASTN, dn->last_node) | SET_VAL 79 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_DN_HLS, dn->hdr_len_store) | SET_VAL 80 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_DN_EXT, dn->hdr_extn) | SET_VAL 81 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_DN_BSTOR, dn->byte_store) | SET_VAL 82 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_DN_SBSTOR, dn->search_byte_store) | SET_VAL 83 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_DN_RPTR, dn->result_pointer); SET_VAL 92 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c buf[j++] = SET_VAL(CLE_BR_VALID, br->valid) | SET_VAL 93 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_BR_NPPTR, npp) | SET_VAL 94 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_BR_JB, br->jump_bw) | SET_VAL 95 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_BR_JR, br->jump_rel) | SET_VAL 96 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_BR_OP, br->operation) | SET_VAL 97 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_BR_NNODE, br->next_node) | SET_VAL 98 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_BR_NBR, br->next_branch); SET_VAL 100 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c buf[j++] = SET_VAL(CLE_BR_DATA, br->data) | SET_VAL 101 drivers/net/ethernet/apm/xgene/xgene_enet_cle.c SET_VAL(CLE_BR_MASK, br->mask); SET_VAL 33 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(FPQNUM, buf_pool->dst_ring_num) | SET_VAL 34 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(STASH, 3)); SET_VAL 104 drivers/net/ethernet/apm/xgene/xgene_enet_main.c raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) | SET_VAL 105 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(BUFDATALEN, hw_len) | SET_VAL 155 drivers/net/ethernet/apm/xgene/xgene_enet_main.c raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) | SET_VAL 156 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(BUFDATALEN, bufdatalen) | SET_VAL 360 drivers/net/ethernet/apm/xgene/xgene_enet_main.c *hopinfo |= SET_BIT(ET) | SET_VAL(MSS, mss_index); SET_VAL 368 drivers/net/ethernet/apm/xgene/xgene_enet_main.c *hopinfo |= SET_VAL(TCPHDR, l4hlen) | SET_VAL 369 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(IPHDR, l3hlen) | SET_VAL 370 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(ETHHDR, ethhdr) | SET_VAL 371 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(EC, csum_enable) | SET_VAL 372 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(IS, proto) | SET_VAL 386 drivers/net/ethernet/apm/xgene/xgene_enet_main.c desc[idx ^ 1] = cpu_to_le64(SET_VAL(DATAADDR, addr) | SET_VAL 387 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(BUFDATALEN, len)); SET_VAL 432 drivers/net/ethernet/apm/xgene/xgene_enet_main.c raw_desc->m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring->dst_ring_num) | SET_VAL 445 drivers/net/ethernet/apm/xgene/xgene_enet_main.c raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) | SET_VAL 446 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(BUFDATALEN, hw_len) | SET_VAL 533 drivers/net/ethernet/apm/xgene/xgene_enet_main.c exp_desc[2] = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) | SET_VAL 534 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(LL_BYTES_MSB, i) | SET_VAL 535 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(LL_LEN, idx)); SET_VAL 536 drivers/net/ethernet/apm/xgene/xgene_enet_main.c raw_desc->m2 = cpu_to_le64(SET_VAL(LL_BYTES_LSB, ell_bytes)); SET_VAL 540 drivers/net/ethernet/apm/xgene/xgene_enet_main.c raw_desc->m0 = cpu_to_le64(SET_VAL(LL, ll) | SET_VAL(NV, nv) | SET_VAL 541 drivers/net/ethernet/apm/xgene/xgene_enet_main.c SET_VAL(USERINFO, tx_ring->tail)); SET_VAL 18 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c ring_cfg[0] |= SET_VAL(X2_INTLINE, ring->id & RING_BUFNUM_MASK); SET_VAL 21 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c ring_cfg[0] |= SET_VAL(X2_CFGCRID, 2); SET_VAL 24 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c ring_cfg[2] |= QCOHERENT | SET_VAL(RINGADDRL, addr); SET_VAL 27 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c ring_cfg[3] |= SET_VAL(RINGSIZE, ring->cfgsize) SET_VAL 29 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c | SET_VAL(RINGADDRH, addr); SET_VAL 30 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c ring_cfg[4] |= SET_VAL(X2_SELTHRSH, 1); SET_VAL 42 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c ring_cfg[4] |= SET_VAL(X2_RINGTYPE, val); SET_VAL 44 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c ring_cfg[3] |= SET_VAL(RINGMODE, BUFPOOL_MODE); SET_VAL 52 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c ring_cfg[4] |= SET_VAL(X2_RECOMTIMEOUT, 0x7); SET_VAL 163 drivers/net/ethernet/apm/xgene/xgene_enet_ring2.c data = SET_VAL(X2_INTLINE, ring->id & RING_BUFNUM_MASK) | SET_VAL 231 drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c data = SET_VAL(TSO_MSS1, data >> TSO_MSS1_POS) | SET_VAL 232 drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c SET_VAL(TSO_MSS0, mss); SET_VAL 234 drivers/net/ethernet/apm/xgene/xgene_enet_xgmac.c data = SET_VAL(TSO_MSS1, mss) | SET_VAL(TSO_MSS0, data); SET_VAL 86 drivers/net/phy/mdio-xgene.c data = SET_VAL(PHY_ADDR, phy_id) | SET_VAL(REG_ADDR, reg); SET_VAL 112 drivers/net/phy/mdio-xgene.c val = SET_VAL(PHY_ADDR, phy_id) | SET_VAL(REG_ADDR, reg); SET_VAL 218 drivers/net/phy/mdio-xgene.c val = SET_VAL(HSTPHYADX, phy_id) | SET_VAL(HSTREGADX, reg) | SET_VAL 219 drivers/net/phy/mdio-xgene.c SET_VAL(HSTMIIMWRDAT, data); SET_VAL 222 drivers/net/phy/mdio-xgene.c val = HSTLDCMD | SET_VAL(HSTMIIMCMD, MIIM_CMD_LEGACY_WRITE); SET_VAL 241 drivers/net/phy/mdio-xgene.c val = SET_VAL(HSTPHYADX, phy_id) | SET_VAL(HSTREGADX, reg); SET_VAL 244 drivers/net/phy/mdio-xgene.c val = HSTLDCMD | SET_VAL(HSTMIIMCMD, MIIM_CMD_LEGACY_READ); SET_VAL 420 drivers/net/wireless/ath/carl9170/mac.c SET_VAL(AR9170_MAC_BCN_DTIM, v, SET_VAL 438 drivers/net/wireless/ath/carl9170/mac.c SET_VAL(AR9170_MAC_BCN_DTIM, v, SET_VAL 463 drivers/net/wireless/ath/carl9170/mac.c SET_VAL(AR9170_MAC_BCN_PERIOD, v, ar->global_beacon_int); SET_VAL 464 drivers/net/wireless/ath/carl9170/mac.c SET_VAL(AR9170_MAC_PRETBTT, pretbtt, ar->global_pretbtt); SET_VAL 465 drivers/net/wireless/ath/carl9170/mac.c SET_VAL(AR9170_MAC_PRETBTT2, pretbtt, ar->global_pretbtt); SET_VAL 461 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_SETTLING_SWITCH, val, m->switchSettling); SET_VAL 467 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_DESIRED_SZ_PGA, val, m->pgaDesiredSize); SET_VAL 468 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_DESIRED_SZ_ADC, val, m->adcDesiredSize); SET_VAL 473 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_RF_CTL4_TX_END_XPAB_OFF, val, m->txEndToXpaOff); SET_VAL 474 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_RF_CTL4_TX_END_XPAA_OFF, val, m->txEndToXpaOff); SET_VAL 475 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_RF_CTL4_FRAME_XPAB_ON, val, m->txFrameToXpaOn); SET_VAL 476 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_RF_CTL4_FRAME_XPAA_ON, val, m->txFrameToXpaOn); SET_VAL 481 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_RF_CTL3_TX_END_TO_A2_RX_ON, val, m->txEndToRxOn); SET_VAL 491 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_RXGAIN_TXRX_ATTEN, val, m->txRxAttenCh[0]); SET_VAL 497 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_RXGAIN_TXRX_ATTEN, val, m->txRxAttenCh[1]); SET_VAL 502 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN, val, m->rxTxMarginCh[0]); SET_VAL 505 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_GAIN_2GHZ_BSW_MARGIN, val, m->bswMargin[0]); SET_VAL 511 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_GAIN_2GHZ_RXTX_MARGIN, val, m->rxTxMarginCh[1]); SET_VAL 517 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, val, m->iqCalICh[0]); SET_VAL 518 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, val, m->iqCalQCh[0]); SET_VAL 524 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, val, m->iqCalICh[1]); SET_VAL 525 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, val, m->iqCalQCh[1]); SET_VAL 530 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_TPCRG1_PD_GAIN_1, val, SET_VAL 532 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(AR9170_PHY_TPCRG1_PD_GAIN_2, val, SET_VAL 1672 drivers/net/wireless/ath/carl9170/phy.c SET_VAL(CARL9170FW_PHY_HT_EXT_CHAN_OFF, rf.ht_settings, offs); SET_VAL 785 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(AR9170_TX_PHY_MCS, phyrate, txrate->idx); SET_VAL 943 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(CARL9170_TX_SUPER_RI_TRIES, txc->s.ri[i], SET_VAL 1000 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(CARL9170_TX_SUPER_MISC_QUEUE, txc->s.misc, hw_queue); SET_VAL 1003 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(CARL9170_TX_SUPER_MISC_VIF_ID, txc->s.misc, cvif->id); SET_VAL 1060 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(CARL9170_TX_SUPER_AMPDU_DENSITY, SET_VAL 1063 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(CARL9170_TX_SUPER_AMPDU_FACTOR, SET_VAL 1281 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(CARL9170_TX_SUPER_MISC_QUEUE, q, SET_VAL 1583 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(AR9170_MAC_BCN_HT1_PWR_CTRL, *ht1, 7); SET_VAL 1584 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(AR9170_MAC_BCN_HT1_TPC, *ht1, power); SET_VAL 1585 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(AR9170_MAC_BCN_HT1_CHAIN_MASK, *ht1, chains); SET_VAL 1600 drivers/net/wireless/ath/carl9170/tx.c SET_VAL(AR9170_MAC_BCN_HT2_LEN, *plcp, skb->len + FCS_LEN);