SEC_CTRL2_DATA_AXI_RD_OTSD_CFG_M  403 drivers/crypto/hisilicon/sec/sec_drv.c 	regval &= ~SEC_CTRL2_DATA_AXI_RD_OTSD_CFG_M;
SEC_CTRL2_DATA_AXI_RD_OTSD_CFG_M  405 drivers/crypto/hisilicon/sec/sec_drv.c 		SEC_CTRL2_DATA_AXI_RD_OTSD_CFG_M;