SDMA1_HWIP        111 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c 		return (adev->reg_offset[SDMA1_HWIP][0][1] + offset);
SDMA1_HWIP        117 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c 	[SDMA1_HWIP]	= SDMA1_HWID,
SDMA1_HWIP         46 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));
SDMA1_HWIP         47 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
SDMA1_HWIP         47 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
SDMA1_HWIP         47 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
SDMA1_HWIP        267 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 		return (adev->reg_offset[SDMA1_HWIP][0][0] + offset);
SDMA1_HWIP         49 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));
SDMA1_HWIP         48 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c 		adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));