SDMA0_STATUS_REG  174 drivers/gpu/drm/radeon/cik.c 	case (SDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET):
SDMA0_STATUS_REG  175 drivers/gpu/drm/radeon/cik.c 	case (SDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET):
SDMA0_STATUS_REG 4826 drivers/gpu/drm/radeon/cik.c 		RREG32(SDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET));
SDMA0_STATUS_REG 4828 drivers/gpu/drm/radeon/cik.c 		 RREG32(SDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET));
SDMA0_STATUS_REG 4880 drivers/gpu/drm/radeon/cik.c 	tmp = RREG32(SDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET);
SDMA0_STATUS_REG 4885 drivers/gpu/drm/radeon/cik.c 	tmp = RREG32(SDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET);