SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  148 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c 		m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  247 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c 	if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  267 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c 	temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  282 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c 		SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  506 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 		m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  630 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 	if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  758 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 	temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  773 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 		SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  423 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 		m->sdma_rlc_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  535 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 	if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  656 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 	temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  671 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 		SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  407 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 		m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  528 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 	if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  652 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 	temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  667 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 		SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  405 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 		m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  526 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 	if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  596 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 	temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;
SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK  611 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 		SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);