SDMA0_HWIP 109 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c return (adev->reg_offset[SDMA0_HWIP][0][0] + offset); SDMA0_HWIP 116 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c [SDMA0_HWIP] = SDMA0_HWID, SDMA0_HWIP 45 drivers/gpu/drm/amd/amdgpu/arct_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); SDMA0_HWIP 46 drivers/gpu/drm/amd/amdgpu/navi10_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); SDMA0_HWIP 46 drivers/gpu/drm/amd/amdgpu/navi12_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); SDMA0_HWIP 46 drivers/gpu/drm/amd/amdgpu/navi14_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i])); SDMA0_HWIP 265 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c return (adev->reg_offset[SDMA0_HWIP][0][0] + offset); SDMA0_HWIP 48 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); SDMA0_HWIP 47 drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i]));