SDMA0_GFX_RB_RPTR   72 drivers/gpu/drm/radeon/cik_sdma.c 			reg = SDMA0_GFX_RB_RPTR + SDMA0_REGISTER_OFFSET;
SDMA0_GFX_RB_RPTR   74 drivers/gpu/drm/radeon/cik_sdma.c 			reg = SDMA0_GFX_RB_RPTR + SDMA1_REGISTER_OFFSET;
SDMA0_GFX_RB_RPTR  396 drivers/gpu/drm/radeon/cik_sdma.c 		WREG32(SDMA0_GFX_RB_RPTR + reg_offset, 0);