SDA 127 arch/arm/mach-sa1100/assabet.c GPSR = SDA; SDA 129 arch/arm/mach-sa1100/assabet.c GPCR = SDA; SDA 136 arch/arm/mach-sa1100/assabet.c GPSR = SDA; SDA 148 arch/arm/mach-sa1100/assabet.c GPSR = SDA; SDA 150 arch/arm/mach-sa1100/assabet.c GPCR = SDA; SDA 157 arch/arm/mach-sa1100/assabet.c GPSR = SDA; SDA 159 arch/arm/mach-sa1100/assabet.c GPDR &= ~SDA; SDA 162 arch/arm/mach-sa1100/assabet.c if (GPLR & SDA) SDA 165 arch/arm/mach-sa1100/assabet.c GPCR = SCK | SDA; SDA 167 arch/arm/mach-sa1100/assabet.c GPDR |= SDA; SDA 179 arch/arm/mach-sa1100/assabet.c GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */ SDA 180 arch/arm/mach-sa1100/assabet.c GPDR = (GPDR | SCK | MOD) & ~SDA; SDA 182 arch/arm/mach-sa1100/assabet.c if (!(GPLR & SDA)) SDA 184 arch/arm/mach-sa1100/assabet.c GPDR |= SDA; SDA 193 arch/arm/mach-sa1100/assabet.c GPSR = gplr & (SDA | SCK | MOD); SDA 194 arch/arm/mach-sa1100/assabet.c GPCR = (~gplr) & (SDA | SCK | MOD); SDA 136 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, (byte >> shift) & 1); SDA 157 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, true); SDA 168 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c ack = !read_bit_from_ddc(ddc_handle, SDA); SDA 200 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (read_bit_from_ddc(ddc_handle, SDA)) SDA 220 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, !more); SDA 233 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, true); SDA 254 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, false); SDA 263 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, true); SDA 268 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (read_bit_from_ddc(ddc_handle, SDA)) SDA 339 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, true); SDA 341 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c if (!read_bit_from_ddc(ddc_handle, SDA)) { SDA 353 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_sw.c write_bit_to_ddc(ddc_handle, SDA, false); SDA 176 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h DDC_I2C_REG_LIST(SDA)\ SDA 196 drivers/gpu/drm/amd/display/dc/gpio/ddc_regs.h DDC_I2C_REG_LIST_DCN2(SDA)\ SDA 32 drivers/i2c/busses/i2c-acorn.c u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); SDA 47 drivers/i2c/busses/i2c-acorn.c u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); SDA 51 drivers/i2c/busses/i2c-acorn.c ones |= SDA; SDA 53 drivers/i2c/busses/i2c-acorn.c ones &= ~SDA; SDA 67 drivers/i2c/busses/i2c-acorn.c return (ioc_readb(IOC_CONTROL) & SDA) != 0; SDA 87 drivers/i2c/busses/i2c-acorn.c force_ones = FORCE_ONES | SCL | SDA; SDA 33 drivers/i2c/busses/i2c-versatile.c writel(SDA, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); SDA 46 drivers/i2c/busses/i2c-versatile.c return !!(readl(i2c->base + I2C_CONTROL) & SDA); SDA 79 drivers/i2c/busses/i2c-versatile.c writel(SCL | SDA, i2c->base + I2C_CONTROLS); SDA 108 drivers/rtc/rtc-rs5c313.c scsptr1_data = (scsptr1_data & ~SDA) | SDA 135 drivers/rtc/rtc-rs5c313.c data |= ((__raw_readb(SCSPTR1) & SDA) >> 2) << (7 - i); SDA 3206 drivers/scsi/nsp32.c if (bit != SDA) { SDA 3229 drivers/scsi/nsp32.c nsp32_prom_set(data, SDA, 1); SDA 3231 drivers/scsi/nsp32.c nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting SDA 3240 drivers/scsi/nsp32.c nsp32_prom_set(data, SDA, 0); SDA 3242 drivers/scsi/nsp32.c nsp32_prom_set(data, SDA, 1); SDA 3249 drivers/scsi/nsp32.c nsp32_prom_set(data, SDA, val); SDA 3262 drivers/scsi/nsp32.c val = nsp32_prom_get(data, SDA);