SD1_CMD           116 arch/arm/mach-davinci/dm355.c MUX_CFG(DM355,	SD1_CMD,	3,   7,     1,	  1,	 false)
SD1_CMD            69 arch/arm/mach-davinci/dm365.c MUX_CFG(DM365,	SD1_CMD,	4,   30,    3,	  1,	 false)
SD1_CMD           307 drivers/pinctrl/actions/pinctrl-s700.c 	PINCTRL_PIN(SD1_CMD, "sd1_cmd"),
SD1_CMD           778 drivers/pinctrl/actions/pinctrl-s700.c static unsigned int  sd1_cmd_mfp_pads[]			= { SD1_CMD };
SD1_CMD           271 drivers/pinctrl/actions/pinctrl-s900.c 	PINCTRL_PIN(SD1_CMD, "sd1_cmd"),
SD1_CMD           711 drivers/pinctrl/actions/pinctrl-s900.c static unsigned int sd1_cmd_clk_mfp_pads[]	= { SD1_CMD, SD1_CLK };
SD1_CMD           834 drivers/pinctrl/actions/pinctrl-s900.c 						    SD1_CLK, SD1_CMD };
SD1_CMD           873 drivers/pinctrl/actions/pinctrl-s900.c 						    SD1_CLK, SD1_CMD };
SD1_CMD          1463 drivers/pinctrl/actions/pinctrl-s900.c static PAD_PULLCTL_CONF(SD1_CMD, 1, 14, 2);
SD1_CMD          1622 drivers/pinctrl/actions/pinctrl-s900.c 	[SD1_CMD] = PAD_INFO_PULLCTL(SD1_CMD),
SD1_CMD           678 drivers/pinctrl/sh-pfc/pfc-r8a7779.c 	PINMUX_IPSR_GPSR(IP1_10_7, SD1_CMD),
SD1_CMD          1307 drivers/pinctrl/sh-pfc/pfc-r8a7790.c 	PINMUX_IPSR_GPSR(IP9_19_18, SD1_CMD),
SD1_CMD          1547 drivers/pinctrl/sh-pfc/pfc-r8a7791.c 	PINMUX_IPSR_GPSR(IP13_22, SD1_CMD),
SD1_CMD           692 drivers/pinctrl/sh-pfc/pfc-r8a7794.c 	PINMUX_SINGLE(SD1_CMD),
SD1_CMD           155 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define GPSR3_7		F_(SD1_CMD,		IP8_15_12)
SD1_CMD           325 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP8_15_12	FM(SD1_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_G)	F_(0, 0)			F_(0, 0)	FM(SIM0_D_A)	FM(STP_IVCXO27_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
SD1_CMD          1058 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c 	PINMUX_IPSR_GPSR(IP8_15_12,	SD1_CMD),
SD1_CMD           156 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define GPSR3_7		F_(SD1_CMD,		IP8_15_12)
SD1_CMD           325 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP8_15_12	FM(SD1_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_G)	FM(NFCE_N_B)			F_(0, 0)	FM(SIM0_D_A)	FM(STP_IVCXO27_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
SD1_CMD          1063 drivers/pinctrl/sh-pfc/pfc-r8a7795.c 	PINMUX_IPSR_GPSR(IP8_15_12,	SD1_CMD),
SD1_CMD           160 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define GPSR3_7		F_(SD1_CMD,		IP8_15_12)
SD1_CMD           329 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP8_15_12	FM(SD1_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_G)	FM(NFCE_N_B)			F_(0, 0)	FM(SIM0_D_A)	FM(STP_IVCXO27_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
SD1_CMD          1066 drivers/pinctrl/sh-pfc/pfc-r8a7796.c 	PINMUX_IPSR_GPSR(IP8_15_12,	SD1_CMD),
SD1_CMD           161 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define GPSR3_7		F_(SD1_CMD,		IP8_15_12)
SD1_CMD           330 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP8_15_12	FM(SD1_CMD)		F_(0, 0)	FM(MSIOF1_SYNC_G)	FM(NFCE_N_B)			F_(0, 0)	FM(SIM0_D_A)	FM(STP_IVCXO27_1_B)	F_(0, 0)	F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
SD1_CMD          1069 drivers/pinctrl/sh-pfc/pfc-r8a77965.c 	PINMUX_IPSR_GPSR(IP8_15_12,	SD1_CMD),
SD1_CMD           149 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define GPSR3_7		F_(SD1_CMD,		IP8_27_24)
SD1_CMD           288 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP8_27_24	FM(SD1_CMD)		FM(NFDATA15_B)		F_(0, 0)		F_(0, 0)		F_(0, 0)		F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0)	F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
SD1_CMD          1008 drivers/pinctrl/sh-pfc/pfc-r8a77990.c 	PINMUX_IPSR_GPSR(IP8_27_24,		SD1_CMD),