SD1_CLK 115 arch/arm/mach-davinci/dm355.c MUX_CFG(DM355, SD1_CLK, 3, 6, 1, 1, false) SD1_CLK 68 arch/arm/mach-davinci/dm365.c MUX_CFG(DM365, SD1_CLK, 0, 16, 3, 1, false) SD1_CLK 308 drivers/pinctrl/actions/pinctrl-s700.c PINCTRL_PIN(SD1_CLK, "sd1_clk"), SD1_CLK 1754 drivers/pinctrl/actions/pinctrl-s700.c [SD1_CLK] = PAD_INFO(SD1_CLK), SD1_CLK 272 drivers/pinctrl/actions/pinctrl-s900.c PINCTRL_PIN(SD1_CLK, "sd1_clk"), SD1_CLK 711 drivers/pinctrl/actions/pinctrl-s900.c static unsigned int sd1_cmd_clk_mfp_pads[] = { SD1_CMD, SD1_CLK }; SD1_CLK 834 drivers/pinctrl/actions/pinctrl-s900.c SD1_CLK, SD1_CMD }; SD1_CLK 873 drivers/pinctrl/actions/pinctrl-s900.c SD1_CLK, SD1_CMD }; SD1_CLK 1623 drivers/pinctrl/actions/pinctrl-s900.c [SD1_CLK] = PAD_INFO(SD1_CLK), SD1_CLK 673 drivers/pinctrl/sh-pfc/pfc-r8a7779.c PINMUX_IPSR_GPSR(IP1_6_4, SD1_CLK), SD1_CLK 1305 drivers/pinctrl/sh-pfc/pfc-r8a7790.c PINMUX_IPSR_GPSR(IP9_17_16, SD1_CLK), SD1_CLK 808 drivers/pinctrl/sh-pfc/pfc-r8a7791.c PINMUX_SINGLE(SD1_CLK), SD1_CLK 691 drivers/pinctrl/sh-pfc/pfc-r8a7794.c PINMUX_SINGLE(SD1_CLK), SD1_CLK 156 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define GPSR3_6 F_(SD1_CLK, IP8_11_8) SD1_CLK 324 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SD1_CLK 1054 drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK), SD1_CLK 157 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define GPSR3_6 F_(SD1_CLK, IP8_11_8) SD1_CLK 324 drivers/pinctrl/sh-pfc/pfc-r8a7795.c #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SD1_CLK 1059 drivers/pinctrl/sh-pfc/pfc-r8a7795.c PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK), SD1_CLK 161 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define GPSR3_6 F_(SD1_CLK, IP8_11_8) SD1_CLK 328 drivers/pinctrl/sh-pfc/pfc-r8a7796.c #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SD1_CLK 1062 drivers/pinctrl/sh-pfc/pfc-r8a7796.c PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK), SD1_CLK 162 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define GPSR3_6 F_(SD1_CLK, IP8_11_8) SD1_CLK 329 drivers/pinctrl/sh-pfc/pfc-r8a77965.c #define IP8_11_8 FM(SD1_CLK) F_(0, 0) FM(MSIOF1_SCK_G) F_(0, 0) F_(0, 0) FM(SIM0_CLK_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SD1_CLK 1065 drivers/pinctrl/sh-pfc/pfc-r8a77965.c PINMUX_IPSR_GPSR(IP8_11_8, SD1_CLK), SD1_CLK 150 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define GPSR3_6 F_(SD1_CLK, IP8_23_20) SD1_CLK 287 drivers/pinctrl/sh-pfc/pfc-r8a77990.c #define IP8_23_20 FM(SD1_CLK) FM(NFDATA14_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) SD1_CLK 1005 drivers/pinctrl/sh-pfc/pfc-r8a77990.c PINMUX_IPSR_GPSR(IP8_23_20, SD1_CLK),