SCL_V_2TAP_HARDCODE_COEF_EN  359 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 						SCL_V_2TAP_HARDCODE_COEF_EN, 0);
SCL_V_2TAP_HARDCODE_COEF_EN  187 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(SCL_VERT_FILTER_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh), \
SCL_V_2TAP_HARDCODE_COEF_EN  280 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(SCL0_SCL_VERT_FILTER_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh), \
SCL_V_2TAP_HARDCODE_COEF_EN  372 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	type SCL_V_2TAP_HARDCODE_COEF_EN; \
SCL_V_2TAP_HARDCODE_COEF_EN  226 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	TF_SF(DSCL0_DSCL_2TAP_CONTROL, SCL_V_2TAP_HARDCODE_COEF_EN, mask_sh),\
SCL_V_2TAP_HARDCODE_COEF_EN  510 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h 	type SCL_V_2TAP_HARDCODE_COEF_EN; \
SCL_V_2TAP_HARDCODE_COEF_EN  329 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c 		SCL_V_2TAP_HARDCODE_COEF_EN, v_2tap_hardcode_coef_en,