SCL_PSCL_EN       124 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 		if (xfm_dce->xfm_mask->SCL_PSCL_EN != 0)
SCL_PSCL_EN       125 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 			REG_UPDATE_2(SCL_MODE, SCL_MODE, 0, SCL_PSCL_EN, 0);
SCL_PSCL_EN       140 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 	if (xfm_dce->xfm_mask->SCL_PSCL_EN != 0)
SCL_PSCL_EN       141 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c 		REG_UPDATE(SCL_MODE, SCL_PSCL_EN, 1);
SCL_PSCL_EN       205 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(SCL_MODE, SCL_PSCL_EN, mask_sh)
SCL_PSCL_EN       288 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	XFM_SF(SCL0_SCL_MODE, SCL_PSCL_EN, mask_sh)
SCL_PSCL_EN       343 drivers/gpu/drm/amd/display/dc/dce/dce_transform.h 	type SCL_PSCL_EN; \
SCL_PSCL_EN       180 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c 		set_reg_field_value(value, 1, SCLV_MODE, SCL_PSCL_EN);
SCL_PSCL_EN       184 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c 		set_reg_field_value(value, 0, SCLV_MODE, SCL_PSCL_EN);
SCL_PSCL_EN       199 drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c 			get_reg_field_value(value, SCLV_MODE, SCL_PSCL_EN),