SCLK_PWRMGT_CNTL 3805 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL 3807 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL 4243 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL 4245 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL 4248 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL 4251 drivers/gpu/drm/amd/amdgpu/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL  416 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			SCLK_PWRMGT_CNTL, RESET_SCLK_CNT, 0);
SCLK_PWRMGT_CNTL  418 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			SCLK_PWRMGT_CNTL, RESET_BUSY_CNT, 0);
SCLK_PWRMGT_CNTL  433 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			SCLK_PWRMGT_CNTL, RESET_SCLK_CNT, 1);
SCLK_PWRMGT_CNTL  435 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 			SCLK_PWRMGT_CNTL, RESET_BUSY_CNT, 1);
SCLK_PWRMGT_CNTL  988 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL,
SCLK_PWRMGT_CNTL 1149 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL,
SCLK_PWRMGT_CNTL 1221 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SCLK_PWRMGT_CNTL,
SCLK_PWRMGT_CNTL 1537 drivers/gpu/drm/radeon/ci_dpm.c 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);
SCLK_PWRMGT_CNTL 1539 drivers/gpu/drm/radeon/ci_dpm.c 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
SCLK_PWRMGT_CNTL 1598 drivers/gpu/drm/radeon/ci_dpm.c 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);
SCLK_PWRMGT_CNTL 1600 drivers/gpu/drm/radeon/ci_dpm.c 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
SCLK_PWRMGT_CNTL 1621 drivers/gpu/drm/radeon/ci_dpm.c 	u32 tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);
SCLK_PWRMGT_CNTL 1627 drivers/gpu/drm/radeon/ci_dpm.c 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
SCLK_PWRMGT_CNTL 2061 drivers/gpu/drm/radeon/ci_dpm.c 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);
SCLK_PWRMGT_CNTL 2063 drivers/gpu/drm/radeon/ci_dpm.c 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
SCLK_PWRMGT_CNTL 2079 drivers/gpu/drm/radeon/ci_dpm.c 	tmp = RREG32_SMC(SCLK_PWRMGT_CNTL);
SCLK_PWRMGT_CNTL 2081 drivers/gpu/drm/radeon/ci_dpm.c 	WREG32_SMC(SCLK_PWRMGT_CNTL, tmp);
SCLK_PWRMGT_CNTL  104 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  105 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  106 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  142 drivers/gpu/drm/radeon/cypress_dpm.c 			WREG32_P(SCLK_PWRMGT_CNTL, DYN_LIGHT_SLEEP_EN, ~DYN_LIGHT_SLEEP_EN);
SCLK_PWRMGT_CNTL  144 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  146 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  147 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  148 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  152 drivers/gpu/drm/radeon/cypress_dpm.c 			WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_LIGHT_SLEEP_EN);
SCLK_PWRMGT_CNTL  249 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL  251 drivers/gpu/drm/radeon/cypress_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL  662 drivers/gpu/drm/radeon/kv_dpm.c 	u32 sclk_pwrmgt_cntl = RREG32_SMC(SCLK_PWRMGT_CNTL);
SCLK_PWRMGT_CNTL  667 drivers/gpu/drm/radeon/kv_dpm.c 	WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);
SCLK_PWRMGT_CNTL  672 drivers/gpu/drm/radeon/kv_dpm.c 	u32 sclk_pwrmgt_cntl = RREG32_SMC(SCLK_PWRMGT_CNTL);
SCLK_PWRMGT_CNTL  676 drivers/gpu/drm/radeon/kv_dpm.c 	WREG32_SMC(SCLK_PWRMGT_CNTL, sclk_pwrmgt_cntl);
SCLK_PWRMGT_CNTL 1207 drivers/gpu/drm/radeon/ni_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL 1208 drivers/gpu/drm/radeon/ni_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL 1209 drivers/gpu/drm/radeon/ni_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  247 drivers/gpu/drm/radeon/r600_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  249 drivers/gpu/drm/radeon/r600_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  306 drivers/gpu/drm/radeon/r600_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL  308 drivers/gpu/drm/radeon/r600_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL  361 drivers/gpu/drm/radeon/r600_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL  363 drivers/gpu/drm/radeon/r600_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL  365 drivers/gpu/drm/radeon/r600_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL  367 drivers/gpu/drm/radeon/r600_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL  452 drivers/gpu/drm/radeon/rv730_dpm.c 	WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL  470 drivers/gpu/drm/radeon/rv730_dpm.c 	WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL  133 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  135 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  136 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  137 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  172 drivers/gpu/drm/radeon/rv770_dpm.c 	if (RREG32(SCLK_PWRMGT_CNTL) & DYN_GFX_CLK_OFF_EN)
SCLK_PWRMGT_CNTL  176 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  181 drivers/gpu/drm/radeon/rv770_dpm.c 	WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL  199 drivers/gpu/drm/radeon/rv770_dpm.c 	WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL  853 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL  855 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL  857 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL  859 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL 1632 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL 1633 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL 1634 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL 1663 drivers/gpu/drm/radeon/rv770_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL 3346 drivers/gpu/drm/radeon/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL 3348 drivers/gpu/drm/radeon/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, SCLK_PWRMGT_OFF, ~SCLK_PWRMGT_OFF);
SCLK_PWRMGT_CNTL 3778 drivers/gpu/drm/radeon/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL 3780 drivers/gpu/drm/radeon/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL 3783 drivers/gpu/drm/radeon/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL 3786 drivers/gpu/drm/radeon/si_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL   91 drivers/gpu/drm/radeon/sumo_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL   93 drivers/gpu/drm/radeon/sumo_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL   94 drivers/gpu/drm/radeon/sumo_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL   95 drivers/gpu/drm/radeon/sumo_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  441 drivers/gpu/drm/radeon/sumo_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL  443 drivers/gpu/drm/radeon/sumo_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_FORCE_TREND_SEL, ~FIR_FORCE_TREND_SEL);
SCLK_PWRMGT_CNTL  446 drivers/gpu/drm/radeon/sumo_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL  449 drivers/gpu/drm/radeon/sumo_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, FIR_TREND_MODE, ~FIR_TREND_MODE);
SCLK_PWRMGT_CNTL  917 drivers/gpu/drm/radeon/sumo_dpm.c 	WREG32_P(SCLK_PWRMGT_CNTL, FIR_RESET, ~FIR_RESET);
SCLK_PWRMGT_CNTL  922 drivers/gpu/drm/radeon/sumo_dpm.c 	WREG32_P(SCLK_PWRMGT_CNTL, 0, ~FIR_RESET);
SCLK_PWRMGT_CNTL  447 drivers/gpu/drm/radeon/trinity_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, DYN_GFX_CLK_OFF_EN, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  449 drivers/gpu/drm/radeon/trinity_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_GFX_CLK_OFF_EN);
SCLK_PWRMGT_CNTL  450 drivers/gpu/drm/radeon/trinity_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, GFX_CLK_FORCE_ON, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  451 drivers/gpu/drm/radeon/trinity_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~GFX_CLK_FORCE_ON);
SCLK_PWRMGT_CNTL  510 drivers/gpu/drm/radeon/trinity_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, DYN_PWR_DOWN_EN, ~DYN_PWR_DOWN_EN);
SCLK_PWRMGT_CNTL  512 drivers/gpu/drm/radeon/trinity_dpm.c 		WREG32_P(SCLK_PWRMGT_CNTL, 0, ~DYN_PWR_DOWN_EN);
SCLK_PWRMGT_CNTL  774 drivers/gpu/drm/radeon/trinity_dpm.c 		if (RREG32(SCLK_PWRMGT_CNTL) & DYNAMIC_PM_EN)
SCLK_PWRMGT_CNTL  805 drivers/gpu/drm/radeon/trinity_dpm.c 	WREG32_P(SCLK_PWRMGT_CNTL, 0, ~(RESET_SCLK_CNT | RESET_BUSY_CNT));
SCLK_PWRMGT_CNTL  810 drivers/gpu/drm/radeon/trinity_dpm.c 	WREG32_P(SCLK_PWRMGT_CNTL, RESET_SCLK_CNT | RESET_BUSY_CNT,