SCC_WRITE 243 arch/m68k/atari/debug.c SCC_WRITE(9, 0xc0); /* reset */ SCC_WRITE 245 arch/m68k/atari/debug.c SCC_WRITE(4, (cflag & PARENB) ? ((cflag & PARODD) ? 0x01 : 0x03) SCC_WRITE 247 arch/m68k/atari/debug.c SCC_WRITE(3, reg3); SCC_WRITE 248 arch/m68k/atari/debug.c SCC_WRITE(5, reg5); SCC_WRITE 249 arch/m68k/atari/debug.c SCC_WRITE(9, 0); /* no interrupts */ SCC_WRITE 251 arch/m68k/atari/debug.c SCC_WRITE(10, 0); /* NRZ mode */ SCC_WRITE 252 arch/m68k/atari/debug.c SCC_WRITE(11, clksrc); /* main clock source */ SCC_WRITE 253 arch/m68k/atari/debug.c SCC_WRITE(12, div); /* BRG value */ SCC_WRITE 254 arch/m68k/atari/debug.c SCC_WRITE(13, 0); /* BRG high byte */ SCC_WRITE 255 arch/m68k/atari/debug.c SCC_WRITE(14, brgsrc_table[baud]); SCC_WRITE 256 arch/m68k/atari/debug.c SCC_WRITE(14, brgsrc_table[baud] | (div ? 1 : 0)); SCC_WRITE 257 arch/m68k/atari/debug.c SCC_WRITE(3, reg3 | 1); SCC_WRITE 258 arch/m68k/atari/debug.c SCC_WRITE(5, reg5 | 8);