SCALER_DISPCTRL   418 drivers/gpu/drm/vc4/vc4_crtc.c 		dispctrl = HVS_READ(SCALER_DISPCTRL) &
SCALER_DISPCTRL   420 drivers/gpu/drm/vc4/vc4_crtc.c 		HVS_WRITE(SCALER_DISPCTRL, dispctrl | dsp3_mux);
SCALER_DISPCTRL   448 drivers/gpu/drm/vc4/vc4_crtc.c 	WARN_ON_ONCE((HVS_READ(SCALER_DISPCTRL) & SCALER_DISPCTRL_ENABLE) !=
SCALER_DISPCTRL    31 drivers/gpu/drm/vc4/vc4_hvs.c 	VC4_REG32(SCALER_DISPCTRL),
SCALER_DISPCTRL   160 drivers/gpu/drm/vc4/vc4_hvs.c 	u32 dispctrl = HVS_READ(SCALER_DISPCTRL);
SCALER_DISPCTRL   164 drivers/gpu/drm/vc4/vc4_hvs.c 	HVS_WRITE(SCALER_DISPCTRL, dispctrl);
SCALER_DISPCTRL   170 drivers/gpu/drm/vc4/vc4_hvs.c 	u32 dispctrl = HVS_READ(SCALER_DISPCTRL);
SCALER_DISPCTRL   176 drivers/gpu/drm/vc4/vc4_hvs.c 	HVS_WRITE(SCALER_DISPCTRL, dispctrl);
SCALER_DISPCTRL   197 drivers/gpu/drm/vc4/vc4_hvs.c 	control = HVS_READ(SCALER_DISPCTRL);
SCALER_DISPCTRL   272 drivers/gpu/drm/vc4/vc4_hvs.c 	dispctrl = HVS_READ(SCALER_DISPCTRL);
SCALER_DISPCTRL   298 drivers/gpu/drm/vc4/vc4_hvs.c 	HVS_WRITE(SCALER_DISPCTRL, dispctrl);