S3C_SYSREG         16 arch/arm/mach-s3c64xx/regs-sys.h #define S3C64XX_AHB_CON0		S3C_SYSREG(0x100)
S3C_SYSREG         17 arch/arm/mach-s3c64xx/regs-sys.h #define S3C64XX_AHB_CON1		S3C_SYSREG(0x104)
S3C_SYSREG         18 arch/arm/mach-s3c64xx/regs-sys.h #define S3C64XX_AHB_CON2		S3C_SYSREG(0x108)
S3C_SYSREG         20 arch/arm/mach-s3c64xx/regs-sys.h #define S3C64XX_SDMA_SEL		S3C_SYSREG(0x110)
S3C_SYSREG         22 arch/arm/mach-s3c64xx/regs-sys.h #define S3C64XX_OTHERS			S3C_SYSREG(0x900)
S3C_SYSREG         14 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_PWR_CFG				S3C_SYSREG(0x804)
S3C_SYSREG         44 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_EINT_MASK			S3C_SYSREG(0x808)
S3C_SYSREG         46 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_NORMAL_CFG			S3C_SYSREG(0x810)
S3C_SYSREG         57 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_STOP_CFG			S3C_SYSREG(0x814)
S3C_SYSREG         65 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_SLEEP_CFG			S3C_SYSREG(0x818)
S3C_SYSREG         69 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_STOP_MEM_CFG			S3C_SYSREG(0x81c)
S3C_SYSREG         79 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_OSC_STABLE			S3C_SYSREG(0x824)
S3C_SYSREG         80 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_PWR_STABLE			S3C_SYSREG(0x828)
S3C_SYSREG         82 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_WAKEUP_STAT			S3C_SYSREG(0x908)
S3C_SYSREG         96 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_BLK_PWR_STAT			S3C_SYSREG(0x90c)
S3C_SYSREG        107 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_INFORM0				S3C_SYSREG(0xA00)
S3C_SYSREG        108 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_INFORM1				S3C_SYSREG(0xA04)
S3C_SYSREG        109 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_INFORM2				S3C_SYSREG(0xA08)
S3C_SYSREG        110 arch/arm/mach-s3c64xx/regs-syscon-power.h #define S3C64XX_INFORM3				S3C_SYSREG(0xA0C)