R_VCS             416 drivers/gpu/drm/i915/gvt/cmd_parser.c #define R_ALL (R_RCS | R_VCS | R_BCS | R_VECS)
R_VCS            2524 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2527 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2530 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_BDW_PLUS, 0, 12, NULL},
R_VCS            2533 drivers/gpu/drm/i915/gvt/cmd_parser.c 		F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},
R_VCS            2536 drivers/gpu/drm/i915/gvt/cmd_parser.c 		F_LEN_VAR, R_VCS, D_BDW_PLUS, ADDR_FIX_3(1, 3, 5), 12, NULL},
R_VCS            2538 drivers/gpu/drm/i915/gvt/cmd_parser.c 	{"OP_2_0_0_5", OP_2_0_0_5, F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},
R_VCS            2541 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2544 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2547 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2550 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2553 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2556 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2559 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 6, NULL},
R_VCS            2562 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2565 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2568 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2571 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2574 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2577 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2580 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2582 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2585 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2588 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, ADDR_FIX_1(2), 12, NULL},
R_VCS            2591 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2594 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2597 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2600 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2603 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2606 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2609 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2612 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2615 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2618 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2621 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2623 drivers/gpu/drm/i915/gvt/cmd_parser.c 	{"MFX_2_6_0_0", OP_MFX_2_6_0_0, F_LEN_VAR, R_VCS, D_ALL,
R_VCS            2626 drivers/gpu/drm/i915/gvt/cmd_parser.c 	{"MFX_2_6_0_9", OP_MFX_2_6_0_9, F_LEN_VAR, R_VCS, D_ALL, 0, 16, NULL},
R_VCS            2628 drivers/gpu/drm/i915/gvt/cmd_parser.c 	{"MFX_2_6_0_8", OP_MFX_2_6_0_8, F_LEN_VAR, R_VCS, D_ALL, 0, 16, NULL},
R_VCS            2631 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2634 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},
R_VCS            2637 drivers/gpu/drm/i915/gvt/cmd_parser.c 		R_VCS, D_ALL, 0, 12, NULL},