ABM_SF 90 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD, mask_sh), \ ABM_SF 91 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL_PWM_PERIOD_CNTL, BL_PWM_PERIOD_BITCNT, mask_sh), \ ABM_SF 92 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL_PWM_CNTL, BL_ACTIVE_INT_FRAC_CNT, mask_sh), \ ABM_SF 93 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN, mask_sh), \ ABM_SF 94 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL_PWM_CNTL, BL_PWM_EN, mask_sh), \ ABM_SF 95 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_IGNORE_MASTER_LOCK_EN, mask_sh), \ ABM_SF 96 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_LOCK, mask_sh), \ ABM_SF 97 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL_PWM_GRP1_REG_LOCK, BL_PWM_GRP1_REG_UPDATE_PENDING, mask_sh), \ ABM_SF 98 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(LVTMA_PWRSEQ_REF_DIV, BL_PWM_REF_DIV, mask_sh), \ ABM_SF 99 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, mask_sh), \ ABM_SF 100 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE0, mask_sh), \ ABM_SF 101 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE1, mask_sh), \ ABM_SF 102 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(MASTER_COMM_CMD_REG, MASTER_COMM_CMD_REG_BYTE2, mask_sh) ABM_SF 106 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_HG_MISC_CTRL, \ ABM_SF 108 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_HG_MISC_CTRL, \ ABM_SF 110 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_HG_MISC_CTRL, \ ABM_SF 112 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \ ABM_SF 114 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \ ABM_SF 116 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_IPCSC_COEFF_SEL, \ ABM_SF 118 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL1_PWM_CURRENT_ABM_LEVEL, \ ABM_SF 120 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL1_PWM_TARGET_ABM_LEVEL, \ ABM_SF 122 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(BL1_PWM_USER_LEVEL, \ ABM_SF 124 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, \ ABM_SF 126 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, \ ABM_SF 128 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_HGLS_REG_READ_PROGRESS, \ ABM_SF 130 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_HGLS_REG_READ_PROGRESS, \ ABM_SF 132 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(DC_ABM1_HGLS_REG_READ_PROGRESS, \ ABM_SF 137 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_HG_MISC_CTRL, \ ABM_SF 139 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_HG_MISC_CTRL, \ ABM_SF 141 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_HG_MISC_CTRL, \ ABM_SF 143 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_IPCSC_COEFF_SEL, \ ABM_SF 145 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_IPCSC_COEFF_SEL, \ ABM_SF 147 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_IPCSC_COEFF_SEL, \ ABM_SF 149 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_BL1_PWM_CURRENT_ABM_LEVEL, \ ABM_SF 151 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_BL1_PWM_TARGET_ABM_LEVEL, \ ABM_SF 153 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_BL1_PWM_USER_LEVEL, \ ABM_SF 155 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, \ ABM_SF 157 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, \ ABM_SF 159 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_HGLS_REG_READ_PROGRESS, \ ABM_SF 161 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_HGLS_REG_READ_PROGRESS, \ ABM_SF 163 drivers/gpu/drm/amd/display/dc/dce/dce_abm.h ABM_SF(ABM0_DC_ABM1_HGLS_REG_READ_PROGRESS, \