RUNTIME_INFO     15021 drivers/gpu/drm/i915/display/intel_display.c 	crtc->num_scalers = RUNTIME_INFO(dev_priv)->num_scalers[crtc->pipe];
RUNTIME_INFO      156 drivers/gpu/drm/i915/display/intel_display.h #define sprite_name(p, s) ((p) * RUNTIME_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
RUNTIME_INFO      304 drivers/gpu/drm/i915/display/intel_display.h 	     (__p) < RUNTIME_INFO(__dev_priv)->num_sprites[(__pipe)] + 1;	\
RUNTIME_INFO      309 drivers/gpu/drm/i915/display/intel_display.h 	     (__s) < RUNTIME_INFO(__dev_priv)->num_sprites[(__p)];	\
RUNTIME_INFO     1209 drivers/gpu/drm/i915/gem/i915_gem_context.c 	const struct sseu_dev_info *device = &RUNTIME_INFO(i915)->sseu;
RUNTIME_INFO      922 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 	if (!RUNTIME_INFO(i915)->sseu.has_slice_pg)
RUNTIME_INFO     1120 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		ndwords, RUNTIME_INFO(i915)->num_engines);
RUNTIME_INFO     1456 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 		count, RUNTIME_INFO(i915)->num_engines);
RUNTIME_INFO      357 drivers/gpu/drm/i915/gt/intel_engine_cs.c 		     RUNTIME_INFO(i915)->vdbox_sfc_access & engine->mask) ||
RUNTIME_INFO      432 drivers/gpu/drm/i915/gt/intel_engine_cs.c 	RUNTIME_INFO(i915)->num_engines = hweight32(mask);
RUNTIME_INFO      608 drivers/gpu/drm/i915/gt/intel_engine_cs.c 		intel_sseu_from_device_info(&RUNTIME_INFO(engine->i915)->sseu);
RUNTIME_INFO      589 drivers/gpu/drm/i915/gt/intel_engine_types.h 	 1 : RUNTIME_INFO(dev_priv__)->sseu.slice_mask)
RUNTIME_INFO      593 drivers/gpu/drm/i915/gt/intel_engine_types.h 	 1 : RUNTIME_INFO(dev_priv__)->sseu.subslice_mask[0])
RUNTIME_INFO      313 drivers/gpu/drm/i915/gt/intel_reset.c 	u8 vdbox_sfc_access = RUNTIME_INFO(engine->i915)->vdbox_sfc_access;
RUNTIME_INFO      380 drivers/gpu/drm/i915/gt/intel_reset.c 	u8 vdbox_sfc_access = RUNTIME_INFO(engine->i915)->vdbox_sfc_access;
RUNTIME_INFO     1578 drivers/gpu/drm/i915/gt/intel_ringbuffer.c 		IS_HASWELL(i915) ? RUNTIME_INFO(i915)->num_engines - 1 : 0;
RUNTIME_INFO       31 drivers/gpu/drm/i915/gt/intel_sseu.c 	const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
RUNTIME_INFO      384 drivers/gpu/drm/i915/gt/intel_workarounds.c 		if (!is_power_of_2(RUNTIME_INFO(i915)->sseu.subslice_7eu[i]))
RUNTIME_INFO      393 drivers/gpu/drm/i915/gt/intel_workarounds.c 		ss = ffs(RUNTIME_INFO(i915)->sseu.subslice_7eu[i]) - 1;
RUNTIME_INFO      753 drivers/gpu/drm/i915/gt/intel_workarounds.c 	const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
RUNTIME_INFO      211 drivers/gpu/drm/i915/gt/selftest_lrc.c 			      2 * RUNTIME_INFO(outer->i915)->num_engines * (count + 2) * (count + 3)) < 0) {
RUNTIME_INFO     1555 drivers/gpu/drm/i915/gt/selftest_lrc.c 		RUNTIME_INFO(smoke->i915)->num_engines, smoke->ncontext);
RUNTIME_INFO     1583 drivers/gpu/drm/i915/gt/selftest_lrc.c 		RUNTIME_INFO(smoke->i915)->num_engines, smoke->ncontext);
RUNTIME_INFO      101 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 	blob->system_info.slice_enabled = hweight8(RUNTIME_INFO(dev_priv)->sseu.slice_mask);
RUNTIME_INFO      107 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 	blob->system_info.vdbox_sfc_support_mask = RUNTIME_INFO(dev_priv)->vdbox_sfc_access;
RUNTIME_INFO       70 drivers/gpu/drm/i915/i915_debugfs.c 	intel_device_info_dump_runtime(RUNTIME_INFO(dev_priv), &p);
RUNTIME_INFO     2793 drivers/gpu/drm/i915/i915_debugfs.c 		   RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz);
RUNTIME_INFO     2809 drivers/gpu/drm/i915/i915_debugfs.c 	intel_device_info_dump_topology(&RUNTIME_INFO(dev_priv)->sseu, &p);
RUNTIME_INFO     3765 drivers/gpu/drm/i915/i915_debugfs.c 	const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
RUNTIME_INFO     3821 drivers/gpu/drm/i915/i915_debugfs.c 	const struct intel_runtime_info *info = RUNTIME_INFO(dev_priv);
RUNTIME_INFO     3849 drivers/gpu/drm/i915/i915_debugfs.c 				RUNTIME_INFO(dev_priv)->sseu.subslice_mask[s];
RUNTIME_INFO     3883 drivers/gpu/drm/i915/i915_debugfs.c 			RUNTIME_INFO(dev_priv)->sseu.eu_per_subslice;
RUNTIME_INFO     3886 drivers/gpu/drm/i915/i915_debugfs.c 				RUNTIME_INFO(dev_priv)->sseu.subslice_mask[s];
RUNTIME_INFO     3894 drivers/gpu/drm/i915/i915_debugfs.c 				RUNTIME_INFO(dev_priv)->sseu.subslice_7eu[s];
RUNTIME_INFO     3948 drivers/gpu/drm/i915/i915_debugfs.c 	i915_print_sseu_info(m, true, &RUNTIME_INFO(dev_priv)->sseu);
RUNTIME_INFO     3952 drivers/gpu/drm/i915/i915_debugfs.c 	sseu.max_slices = RUNTIME_INFO(dev_priv)->sseu.max_slices;
RUNTIME_INFO     3953 drivers/gpu/drm/i915/i915_debugfs.c 	sseu.max_subslices = RUNTIME_INFO(dev_priv)->sseu.max_subslices;
RUNTIME_INFO     3955 drivers/gpu/drm/i915/i915_debugfs.c 		RUNTIME_INFO(dev_priv)->sseu.max_eus_per_subslice;
RUNTIME_INFO     1490 drivers/gpu/drm/i915/i915_drv.c 			   intel_subplatform(RUNTIME_INFO(dev_priv),
RUNTIME_INFO     1495 drivers/gpu/drm/i915/i915_drv.c 		intel_device_info_dump_runtime(RUNTIME_INFO(dev_priv), &p);
RUNTIME_INFO     1533 drivers/gpu/drm/i915/i915_drv.c 	RUNTIME_INFO(i915)->device_id = pdev->device;
RUNTIME_INFO     1840 drivers/gpu/drm/i915/i915_drv.h #define INTEL_DEVID(dev_priv)	(RUNTIME_INFO(dev_priv)->device_id)
RUNTIME_INFO     1901 drivers/gpu/drm/i915/i915_drv.h 	const struct intel_runtime_info *info = RUNTIME_INFO(i915);
RUNTIME_INFO     1914 drivers/gpu/drm/i915/i915_drv.h 	const struct intel_runtime_info *info = RUNTIME_INFO(i915);
RUNTIME_INFO       13 drivers/gpu/drm/i915/i915_getparam.c 	const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
RUNTIME_INFO      154 drivers/gpu/drm/i915/i915_getparam.c 		value = 1000 * RUNTIME_INFO(i915)->cs_timestamp_frequency_khz;
RUNTIME_INFO     1640 drivers/gpu/drm/i915/i915_gpu_error.c 	       RUNTIME_INFO(i915),
RUNTIME_INFO     2822 drivers/gpu/drm/i915/i915_perf.c 			 1000ULL * RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz);
RUNTIME_INFO     3646 drivers/gpu/drm/i915/i915_perf.c 			(RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz / 2);
RUNTIME_INFO       37 drivers/gpu/drm/i915/i915_query.c 	const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
RUNTIME_INFO      114 drivers/gpu/drm/i915/i915_query.c 	      RUNTIME_INFO(i915)->num_engines *
RUNTIME_INFO      188 drivers/gpu/drm/i915/intel_device_info.c 	struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
RUNTIME_INFO      233 drivers/gpu/drm/i915/intel_device_info.c 	struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
RUNTIME_INFO      311 drivers/gpu/drm/i915/intel_device_info.c 	struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
RUNTIME_INFO      366 drivers/gpu/drm/i915/intel_device_info.c 	struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
RUNTIME_INFO      470 drivers/gpu/drm/i915/intel_device_info.c 	struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
RUNTIME_INFO      553 drivers/gpu/drm/i915/intel_device_info.c 	struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
RUNTIME_INFO      813 drivers/gpu/drm/i915/intel_device_info.c 	const struct intel_runtime_info *rinfo = RUNTIME_INFO(i915);
RUNTIME_INFO      820 drivers/gpu/drm/i915/intel_device_info.c 	RUNTIME_INFO(i915)->platform_mask[pi] = BIT(pb);
RUNTIME_INFO      840 drivers/gpu/drm/i915/intel_device_info.c 	RUNTIME_INFO(i915)->platform_mask[pi] |= mask;
RUNTIME_INFO      862 drivers/gpu/drm/i915/intel_device_info.c 	struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv);
RUNTIME_INFO     1028 drivers/gpu/drm/i915/intel_device_info.c 			RUNTIME_INFO(dev_priv)->vdbox_sfc_access |= BIT(i);
RUNTIME_INFO     7566 drivers/gpu/drm/i915/intel_pm.c 	switch (RUNTIME_INFO(dev_priv)->sseu.eu_total) {
RUNTIME_INFO     1220 drivers/gpu/drm/i915/selftests/i915_request.c 		num_waits, num_fences, RUNTIME_INFO(i915)->num_engines, ncpus);