RTC_REF_CLCK_32KHZ  214 arch/alpha/kernel/time.c 		sel = RTC_REF_CLCK_32KHZ + 6;
RTC_REF_CLCK_32KHZ  217 arch/alpha/kernel/time.c 	sel = RTC_REF_CLCK_32KHZ + __builtin_ffs(32768 / CONFIG_HZ);
RTC_REF_CLCK_32KHZ   40 arch/arm/mach-footbridge/isa-rtc.c 	CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A);
RTC_REF_CLCK_32KHZ   50 arch/arm/mach-footbridge/isa-rtc.c 	if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ &&
RTC_REF_CLCK_32KHZ   38 arch/mips/kernel/cevt-ds1287.c 	CMOS_WRITE(RTC_REF_CLCK_32KHZ | rate, RTC_REG_A);
RTC_REF_CLCK_32KHZ  190 arch/mips/mti-malta/malta-time.c 	if ((freq & RTC_DIV_CTL) != RTC_REF_CLCK_32KHZ)
RTC_REF_CLCK_32KHZ  191 arch/mips/mti-malta/malta-time.c 		CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_FREQ_SELECT);
RTC_REF_CLCK_32KHZ  817 drivers/rtc/rtc-cmos.c 		CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);