RTC 58 arch/arm/mach-mmp/clock-pxa168.c static APBC_CLK(rtc, RTC, 8, 32768); RTC 45 arch/arm/mach-mmp/clock-pxa910.c static APBC_CLK(rtc, RTC, 8, 32768); RTC 37 arch/sh/boards/mach-highlander/irq-r7780mp.c INTC_IRQ(RTC, IRQ_RTC), RTC 48 arch/sh/boards/mach-highlander/irq-r7780mp.c { SCIF0, SCIF1, RTC, 0, CF, 0, TP, SMBUS, RTC 33 arch/sh/boards/mach-highlander/irq-r7785rp.c INTC_IRQ(RTC, IRQ_RTC), RTC 48 arch/sh/boards/mach-highlander/irq-r7785rp.c RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } }, RTC 87 arch/sh/kernel/cpu/sh2a/setup-sh7201.c INTC_IRQ(RTC, 152), INTC_IRQ(RTC, 153), RTC 88 arch/sh/kernel/cpu/sh2a/setup-sh7201.c INTC_IRQ(RTC, 154), RTC 158 arch/sh/kernel/cpu/sh2a/setup-sh7201.c { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } }, RTC 106 arch/sh/kernel/cpu/sh2a/setup-sh7203.c INTC_IRQ(RTC, 231), INTC_IRQ(RTC, 232), RTC 107 arch/sh/kernel/cpu/sh2a/setup-sh7203.c INTC_IRQ(RTC, 233), RTC 154 arch/sh/kernel/cpu/sh2a/setup-sh7203.c { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } }, RTC 159 arch/sh/kernel/cpu/sh2a/setup-sh7203.c { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } }, RTC 162 arch/sh/kernel/cpu/sh2a/setup-sh7264.c INTC_IRQ(RTC, 296), INTC_IRQ(RTC, 297), RTC 163 arch/sh/kernel/cpu/sh2a/setup-sh7264.c INTC_IRQ(RTC, 298), RTC 212 arch/sh/kernel/cpu/sh2a/setup-sh7264.c { 0xfffe0c1e, 0, 16, 4, /* IPR21 */ { NFMC, SDHI, RTC, 0 } }, RTC 179 arch/sh/kernel/cpu/sh2a/setup-sh7269.c INTC_IRQ(RTC, 338), INTC_IRQ(RTC, 339), RTC 180 arch/sh/kernel/cpu/sh2a/setup-sh7269.c INTC_IRQ(RTC, 340), RTC 234 arch/sh/kernel/cpu/sh2a/setup-sh7269.c { 0xfffe0c26, 0, 16, 4, /* IPR25 */ { SDHI0, SDHI1, RTC, 0 } }, RTC 48 arch/sh/kernel/cpu/sh3/setup-sh7705.c INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), RTC 49 arch/sh/kernel/cpu/sh3/setup-sh7705.c INTC_VECT(RTC, 0x4c0), RTC 55 arch/sh/kernel/cpu/sh3/setup-sh7705.c { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, RTC 37 arch/sh/kernel/cpu/sh3/setup-sh770x.c INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), RTC 38 arch/sh/kernel/cpu/sh3/setup-sh770x.c INTC_VECT(RTC, 0x4c0), RTC 67 arch/sh/kernel/cpu/sh3/setup-sh770x.c { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, RTC 50 arch/sh/kernel/cpu/sh3/setup-sh7710.c INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), RTC 51 arch/sh/kernel/cpu/sh3/setup-sh7710.c INTC_VECT(RTC, 0x4c0), RTC 57 arch/sh/kernel/cpu/sh3/setup-sh7710.c { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, RTC 238 arch/sh/kernel/cpu/sh3/setup-sh7720.c INTC_VECT(TMU2, 0x440), INTC_VECT(RTC, 0x480), RTC 239 arch/sh/kernel/cpu/sh3/setup-sh7720.c INTC_VECT(RTC, 0x4a0), INTC_VECT(RTC, 0x4c0), RTC 266 arch/sh/kernel/cpu/sh3/setup-sh7720.c { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, RTC 95 arch/sh/kernel/cpu/sh4/setup-sh4-202.c INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), RTC 96 arch/sh/kernel/cpu/sh4/setup-sh4-202.c INTC_VECT(RTC, 0x4c0), RTC 103 arch/sh/kernel/cpu/sh4/setup-sh4-202.c { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, RTC 194 arch/sh/kernel/cpu/sh4/setup-sh7750.c INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), RTC 195 arch/sh/kernel/cpu/sh4/setup-sh7750.c INTC_VECT(RTC, 0x4c0), RTC 205 arch/sh/kernel/cpu/sh4/setup-sh7750.c { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, RTC 581 arch/sh/kernel/cpu/sh4a/setup-sh7722.c INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), RTC 630 arch/sh/kernel/cpu/sh4a/setup-sh7722.c { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, RTC } }, RTC 567 arch/sh/kernel/cpu/sh4a/setup-sh7723.c INTC_GROUP(RTC, RTC_ATI,RTC_PRI,RTC_CUI), RTC 616 arch/sh/kernel/cpu/sh4a/setup-sh7723.c { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC,DMAC1B,0,SDHI0 } }, RTC 1005 arch/sh/kernel/cpu/sh4a/setup-sh7724.c INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), RTC 1070 arch/sh/kernel/cpu/sh4a/setup-sh7724.c { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC, DMAC1B, 0, SDHI0 } }, RTC 412 arch/sh/kernel/cpu/sh4a/setup-sh7734.c INTC_VECT(RTC, 0xC00), RTC 491 arch/sh/kernel/cpu/sh4a/setup-sh7734.c RTC, RTC 502 arch/sh/kernel/cpu/sh4a/setup-sh7734.c { TMU30, TMU60, RTC, SDHI } }, RTC 253 arch/sh/kernel/cpu/sh4a/setup-sh7763.c INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), RTC 254 arch/sh/kernel/cpu/sh4a/setup-sh7763.c INTC_VECT(RTC, 0x4c0), RTC 305 arch/sh/kernel/cpu/sh4a/setup-sh7763.c HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, RTC 316 arch/sh/kernel/cpu/sh4a/setup-sh7763.c { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } }, RTC 314 arch/sh/kernel/cpu/sh4a/setup-sh7780.c INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0), RTC 315 arch/sh/kernel/cpu/sh4a/setup-sh7780.c INTC_VECT(RTC, 0x4c0), RTC 359 arch/sh/kernel/cpu/sh4a/setup-sh7780.c HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, RTC 365 arch/sh/kernel/cpu/sh4a/setup-sh7780.c { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } }, RTC 1970 drivers/clk/clk-stm32mp1.c COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE | RTC 201 drivers/clk/nxp/clk-lpc32xx.c LPC32XX_CLK_DEFINE(RTC, "rtc", 0x0, LPC32XX_CLK_XTAL_32K), RTC 1222 drivers/clk/nxp/clk-lpc32xx.c LPC32XX_DEFINE_FIXED(RTC, 32768), RTC 112 drivers/cpuidle/cpuidle-ux500.c prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) | RTC 1034 drivers/media/dvb-frontends/stv0900_core.c stv0900_write_reg(intp, RTC, 0x88); RTC 472 drivers/media/dvb-frontends/stv0900_sw.c stv0900_write_reg(intp, RTC, 0x80); RTC 492 drivers/media/dvb-frontends/stv0900_sw.c stv0900_write_reg(intp, RTC, 0x88); RTC 1519 drivers/media/dvb-frontends/stv090x.c if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) RTC 2078 drivers/media/dvb-frontends/stv090x.c if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0) RTC 2108 drivers/media/dvb-frontends/stv090x.c if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */ RTC 307 drivers/mfd/db8500-prcmu.c IRQ_ENTRY(RTC), RTC 335 drivers/mfd/db8500-prcmu.c WAKEUP_ENTRY(RTC), RTC 110 drivers/mfd/lp8788.c MFD_DEV_WITH_RESOURCE(RTC, rtc_irqs, ARRAY_SIZE(rtc_irqs)), RTC 248 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RTC, val);