RT5677_PWR_ANLG2  151 sound/soc/codecs/rt5677.c 	{RT5677_PWR_ANLG2		, 0x0000},
RT5677_PWR_ANLG2  301 sound/soc/codecs/rt5677.c 	case RT5677_PWR_ANLG2: /* Modified by DSP firmware */
RT5677_PWR_ANLG2  415 sound/soc/codecs/rt5677.c 	case RT5677_PWR_ANLG2:
RT5677_PWR_ANLG2  725 sound/soc/codecs/rt5677.c 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 2404 sound/soc/codecs/rt5677.c 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 2409 sound/soc/codecs/rt5677.c 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 2428 sound/soc/codecs/rt5677.c 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 2433 sound/soc/codecs/rt5677.c 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 2496 sound/soc/codecs/rt5677.c 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 2503 sound/soc/codecs/rt5677.c 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 2602 sound/soc/codecs/rt5677.c 	SND_SOC_DAPM_SUPPLY("PLL1", RT5677_PWR_ANLG2, RT5677_PWR_PLL1_BIT,
RT5677_PWR_ANLG2 2605 sound/soc/codecs/rt5677.c 	SND_SOC_DAPM_SUPPLY("PLL2", RT5677_PWR_ANLG2, RT5677_PWR_PLL2_BIT,
RT5677_PWR_ANLG2 2651 sound/soc/codecs/rt5677.c 	SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5677_PWR_ANLG2, RT5677_PWR_MB1_BIT,
RT5677_PWR_ANLG2 2690 sound/soc/codecs/rt5677.c 	SND_SOC_DAPM_PGA_E("BST1", RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 2693 sound/soc/codecs/rt5677.c 	SND_SOC_DAPM_PGA_E("BST2", RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 4484 sound/soc/codecs/rt5677.c 			regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
RT5677_PWR_ANLG2 4500 sound/soc/codecs/rt5677.c 		regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,