B15               263 arch/powerpc/xmon/ppc-opc.c #define B24 B15 + 1
B15              7110 arch/powerpc/xmon/ppc-opc.c {"e_bdnz",	EBD15(30,8,BO32DNZ,0),	EBD15_MASK, PPCVLE, 0,		{B15}},
B15              7111 arch/powerpc/xmon/ppc-opc.c {"e_bdnzl",	EBD15(30,8,BO32DNZ,1),	EBD15_MASK, PPCVLE, 0,		{B15}},
B15              7112 arch/powerpc/xmon/ppc-opc.c {"e_bdz",	EBD15(30,8,BO32DZ,0),	EBD15_MASK, PPCVLE, 0,		{B15}},
B15              7113 arch/powerpc/xmon/ppc-opc.c {"e_bdzl",	EBD15(30,8,BO32DZ,1),	EBD15_MASK, PPCVLE, 0,		{B15}},
B15              7114 arch/powerpc/xmon/ppc-opc.c {"e_bge",	EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7115 arch/powerpc/xmon/ppc-opc.c {"e_bgel",	EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7116 arch/powerpc/xmon/ppc-opc.c {"e_bnl",	EBD15BI(30,8,BO32F,CBLT,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7117 arch/powerpc/xmon/ppc-opc.c {"e_bnll",	EBD15BI(30,8,BO32F,CBLT,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7118 arch/powerpc/xmon/ppc-opc.c {"e_blt",	EBD15BI(30,8,BO32T,CBLT,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7119 arch/powerpc/xmon/ppc-opc.c {"e_bltl",	EBD15BI(30,8,BO32T,CBLT,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7120 arch/powerpc/xmon/ppc-opc.c {"e_bgt",	EBD15BI(30,8,BO32T,CBGT,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7121 arch/powerpc/xmon/ppc-opc.c {"e_bgtl",	EBD15BI(30,8,BO32T,CBGT,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7122 arch/powerpc/xmon/ppc-opc.c {"e_ble",	EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7123 arch/powerpc/xmon/ppc-opc.c {"e_blel",	EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7124 arch/powerpc/xmon/ppc-opc.c {"e_bng",	EBD15BI(30,8,BO32F,CBGT,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7125 arch/powerpc/xmon/ppc-opc.c {"e_bngl",	EBD15BI(30,8,BO32F,CBGT,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7126 arch/powerpc/xmon/ppc-opc.c {"e_bne",	EBD15BI(30,8,BO32F,CBEQ,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7127 arch/powerpc/xmon/ppc-opc.c {"e_bnel",	EBD15BI(30,8,BO32F,CBEQ,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7128 arch/powerpc/xmon/ppc-opc.c {"e_beq",	EBD15BI(30,8,BO32T,CBEQ,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7129 arch/powerpc/xmon/ppc-opc.c {"e_beql",	EBD15BI(30,8,BO32T,CBEQ,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7130 arch/powerpc/xmon/ppc-opc.c {"e_bso",	EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7131 arch/powerpc/xmon/ppc-opc.c {"e_bsol",	EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7132 arch/powerpc/xmon/ppc-opc.c {"e_bun",	EBD15BI(30,8,BO32T,CBSO,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7133 arch/powerpc/xmon/ppc-opc.c {"e_bunl",	EBD15BI(30,8,BO32T,CBSO,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7134 arch/powerpc/xmon/ppc-opc.c {"e_bns",	EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7135 arch/powerpc/xmon/ppc-opc.c {"e_bnsl",	EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7136 arch/powerpc/xmon/ppc-opc.c {"e_bnu",	EBD15BI(30,8,BO32F,CBSO,0), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7137 arch/powerpc/xmon/ppc-opc.c {"e_bnul",	EBD15BI(30,8,BO32F,CBSO,1), EBD15BI_MASK, PPCVLE, 0,	{CRS,B15}},
B15              7138 arch/powerpc/xmon/ppc-opc.c {"e_bc",	BD15(30,8,0),	BD15_MASK,	PPCVLE,	0,		{BO32, BI32, B15}},
B15              7139 arch/powerpc/xmon/ppc-opc.c {"e_bcl",	BD15(30,8,1),	BD15_MASK,	PPCVLE,	0,		{BO32, BI32, B15}},
B15              7141 arch/powerpc/xmon/ppc-opc.c {"e_bf",	EBD15(30,8,BO32F,0), EBD15_MASK, PPCVLE, 0,		{BI32,B15}},
B15              7142 arch/powerpc/xmon/ppc-opc.c {"e_bfl",	EBD15(30,8,BO32F,1), EBD15_MASK, PPCVLE, 0,		{BI32,B15}},
B15              7143 arch/powerpc/xmon/ppc-opc.c {"e_bt",	EBD15(30,8,BO32T,0), EBD15_MASK, PPCVLE, 0,		{BI32,B15}},
B15              7144 arch/powerpc/xmon/ppc-opc.c {"e_btl",	EBD15(30,8,BO32T,1), EBD15_MASK, PPCVLE, 0,		{BI32,B15}},
B15               326 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c SIG_EXPR_LIST_DECL_SINGLE(B15, NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18));
B15               329 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c SIG_EXPR_LIST_DECL_DUAL(B15, GPIE2IN, GPIE2, GPIE);
B15               330 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c PIN_DECL_2(B15, GPIOE2, NDSR3, GPIE2IN);
B15               332 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c FUNC_GROUP_DECL(NDSR3, B15);
B15               342 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c FUNC_GROUP_DECL(GPIE2, B15, A15);
B15              1951 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c 	ASPEED_PINCTRL_PIN(B15),
B15              2539 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c 	{ PIN_CONFIG_INPUT_DEBOUNCE, { B15, A15 }, SCUA8, 25 },
B15               556 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_ALIAS(B15, SPI1CS0, SPI1);
B15               557 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(B15, VBCS, VGABIOSROM, COND1, VB_DESC);
B15               558 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c PIN_DECL_2(B15, GPIOI4, SPI1CS0, VBCS);
B15               596 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(SPI1, B15, C15, A14, A15);
B15               597 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(SPI1DEBUG, C18, E15, B16, C16, B15, C15, A14, A15);
B15               598 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(SPI1PASSTHRU, C18, E15, B16, C16, B15, C15, A14, A15);
B15               599 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(VGABIOSROM, B15, C15, A14, A15);
B15              1944 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	ASPEED_PINCTRL_PIN(B15),
B15               721 drivers/pinctrl/pinctrl-pic32.c 	PIC32_PINCTRL_GROUP(31, B15,