RS_ERS 30 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 35 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 40 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 45 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 50 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 55 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 60 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 65 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 70 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 75 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 80 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), RS_ERS 85 arch/sh/kernel/cpu/sh4a/setup-sh7722.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), RS_ERS 36 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 41 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 46 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 51 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 56 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 61 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 66 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 71 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 76 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 81 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 86 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 91 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT), RS_ERS 96 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 101 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 106 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 111 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 116 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 121 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 126 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 131 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT), RS_ERS 136 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), RS_ERS 141 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), RS_ERS 146 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), RS_ERS 151 arch/sh/kernel/cpu/sh4a/setup-sh7724.c .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_16BIT), RS_ERS 120 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 127 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 134 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 141 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 151 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 158 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 165 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 172 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 179 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 186 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 193 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 200 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 210 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 217 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 224 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 231 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 238 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 245 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 252 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 259 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 266 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 273 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 283 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 290 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 297 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 304 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 311 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 318 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 325 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 332 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 339 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = SM_INC | RS_ERS | 0x40000000 | RS_ERS 346 arch/sh/kernel/cpu/sh4a/setup-sh7757.c .chcr = DM_INC | RS_ERS | 0x40000000 | RS_ERS 45 drivers/dma/sh/shdma-arm.h #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz))) RS_ERS 46 drivers/dma/sh/shdma-arm.h #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))