RREG8              77 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 	return RREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE) & 2;
RREG8              86 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 		reg = RREG8(AI_MAIBOX_CONTROL_TRN_OFFSET_BYTE);
RREG8              77 drivers/gpu/drm/cirrus/cirrus_drv.h 		RREG8(VGA_DAC_MASK);					\
RREG8              78 drivers/gpu/drm/cirrus/cirrus_drv.h 		RREG8(VGA_DAC_MASK);					\
RREG8              79 drivers/gpu/drm/cirrus/cirrus_drv.h 		RREG8(VGA_DAC_MASK);					\
RREG8              80 drivers/gpu/drm/cirrus/cirrus_drv.h 		RREG8(VGA_DAC_MASK);					\
RREG8              48 drivers/gpu/drm/mgag200/mgag200_drv.h 		RREG8(0x1fda);					\
RREG8              40 drivers/gpu/drm/mgag200/mgag200_i2c.c 	return RREG8(DAC_DATA);
RREG8              48 drivers/gpu/drm/mgag200/mgag200_i2c.c 	tmp = (RREG8(DAC_DATA) & mask) | val;
RREG8              96 drivers/gpu/drm/mgag200/mgag200_mode.c 		status = RREG8(MGAREG_Status + 2);
RREG8             306 drivers/gpu/drm/mgag200/mgag200_mode.c 			tmp = RREG8(MGAREG_CRTC_DATA);
RREG8             313 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             318 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             323 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(MGAREG_MEM_MISC_READ);
RREG8             328 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             336 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             351 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             359 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             365 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             372 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(MGAREG_SEQ_DATA);
RREG8             377 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             381 drivers/gpu/drm/mgag200/mgag200_mode.c 		vcount = RREG8(MGAREG_VCOUNT);
RREG8             384 drivers/gpu/drm/mgag200/mgag200_mode.c 			tmpcount = RREG8(MGAREG_VCOUNT);
RREG8             394 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             441 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             445 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(MGAREG_MEM_MISC_READ);
RREG8             450 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             454 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             465 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             472 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             478 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             481 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(MGAREG_MEM_MISC_READ);
RREG8             486 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             574 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             578 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(MGAREG_MEM_MISC_READ);
RREG8             583 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             596 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             602 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             607 drivers/gpu/drm/mgag200/mgag200_mode.c 		vcount = RREG8(MGAREG_VCOUNT);
RREG8             610 drivers/gpu/drm/mgag200/mgag200_mode.c 			tmpcount = RREG8(MGAREG_VCOUNT);
RREG8             673 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             678 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             682 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(MGAREG_MEM_MISC_READ);
RREG8             687 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             738 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             744 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             752 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             762 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(DAC_DATA);
RREG8             775 drivers/gpu/drm/mgag200/mgag200_mode.c 			tmp = RREG8(DAC_DATA);
RREG8             789 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(MGAREG_CRTCEXT_DATA);
RREG8             794 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             808 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             814 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(DAC_DATA);
RREG8             840 drivers/gpu/drm/mgag200/mgag200_mode.c 	while (RREG8(0x1fda) & 0x08);
RREG8             841 drivers/gpu/drm/mgag200/mgag200_mode.c 	while (!(RREG8(0x1fda) & 0x08));
RREG8             843 drivers/gpu/drm/mgag200/mgag200_mode.c 	count = RREG8(MGAREG_VCOUNT) + 2;
RREG8             844 drivers/gpu/drm/mgag200/mgag200_mode.c 	while (RREG8(MGAREG_VCOUNT) < count);
RREG8             847 drivers/gpu/drm/mgag200/mgag200_mode.c 	crtcext0 = RREG8(MGAREG_CRTCEXT_DATA);
RREG8            1149 drivers/gpu/drm/mgag200/mgag200_mode.c 		seq1 = RREG8(MGAREG_SEQ_DATA) | 0x20;
RREG8            1294 drivers/gpu/drm/mgag200/mgag200_mode.c 	seq1 |= RREG8(MGAREG_SEQ_DATA) & ~0x20;
RREG8            1300 drivers/gpu/drm/mgag200/mgag200_mode.c 	crtcext1 |= RREG8(MGAREG_CRTCEXT_DATA) & ~0x30;
RREG8            1325 drivers/gpu/drm/mgag200/mgag200_mode.c 	tmp = RREG8(MGAREG_CRTC_DATA);
RREG8            1335 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(MGAREG_SEQ_DATA);
RREG8            1369 drivers/gpu/drm/mgag200/mgag200_mode.c 		tmp = RREG8(MGAREG_SEQ_DATA);
RREG8            3780 drivers/gpu/drm/radeon/r100.c 	save->GENMO_WT = RREG8(R_0003C2_GENMO_WT);
RREG8            3833 drivers/gpu/drm/radeon/r100.c 	tmp = RREG8(R_0003C2_GENMO_WT);
RREG8            1149 drivers/gpu/drm/radeon/radeon_combios.c 	ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3;
RREG8             293 drivers/gpu/drm/radeon/radeon_legacy_tv.c 			if (RREG8(RADEON_CLOCK_CNTL_DATA + 3) >= cnt_threshold)