RREG32_PCIE 66 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c return RREG32_PCIE(index); RREG32_PCIE 243 drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c value = RREG32_PCIE(*pos >> 2); RREG32_PCIE 1405 drivers/gpu/drm/amd/amdgpu/cik.c speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL); RREG32_PCIE 1446 drivers/gpu/drm/amd/amdgpu/cik.c tmp = RREG32_PCIE(ixPCIE_LC_STATUS1); RREG32_PCIE 1453 drivers/gpu/drm/amd/amdgpu/cik.c tmp = RREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL); RREG32_PCIE 1478 drivers/gpu/drm/amd/amdgpu/cik.c tmp = RREG32_PCIE(ixPCIE_LC_CNTL4); RREG32_PCIE 1482 drivers/gpu/drm/amd/amdgpu/cik.c tmp = RREG32_PCIE(ixPCIE_LC_CNTL4); RREG32_PCIE 1510 drivers/gpu/drm/amd/amdgpu/cik.c tmp = RREG32_PCIE(ixPCIE_LC_CNTL4); RREG32_PCIE 1533 drivers/gpu/drm/amd/amdgpu/cik.c speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL); RREG32_PCIE 1538 drivers/gpu/drm/amd/amdgpu/cik.c speed_cntl = RREG32_PCIE(ixPCIE_LC_SPEED_CNTL); RREG32_PCIE 1561 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPCIE_LC_N_FTS_CNTL); RREG32_PCIE 1568 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPCIE_LC_CNTL3); RREG32_PCIE 1573 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPCIE_P_CNTL); RREG32_PCIE 1578 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPCIE_LC_CNTL); RREG32_PCIE 1594 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPB0_PIF_PWRDOWN_0); RREG32_PCIE 1602 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPB0_PIF_PWRDOWN_1); RREG32_PCIE 1610 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPB1_PIF_PWRDOWN_0); RREG32_PCIE 1618 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPB1_PIF_PWRDOWN_1); RREG32_PCIE 1626 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPCIE_LC_LINK_WIDTH_CNTL); RREG32_PCIE 1645 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPCIE_LC_CNTL2); RREG32_PCIE 1689 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPCIE_CNTL2); RREG32_PCIE 1697 drivers/gpu/drm/amd/amdgpu/cik.c data = RREG32_PCIE(ixPCIE_LC_N_FTS_CNTL); RREG32_PCIE 1700 drivers/gpu/drm/amd/amdgpu/cik.c data = RREG32_PCIE(ixPCIE_LC_STATUS1); RREG32_PCIE 1703 drivers/gpu/drm/amd/amdgpu/cik.c orig = data = RREG32_PCIE(ixPCIE_LC_CNTL); RREG32_PCIE 1788 drivers/gpu/drm/amd/amdgpu/cik.c tmp = RREG32_PCIE(ixPCIE_PERF_CNTL_TXCLK); RREG32_PCIE 1793 drivers/gpu/drm/amd/amdgpu/cik.c *count0 = RREG32_PCIE(ixPCIE_PERF_COUNT0_TXCLK) | (cnt0_of << 32); RREG32_PCIE 1794 drivers/gpu/drm/amd/amdgpu/cik.c *count1 = RREG32_PCIE(ixPCIE_PERF_COUNT1_TXCLK) | (cnt1_of << 32); RREG32_PCIE 1819 drivers/gpu/drm/amd/amdgpu/cik.c nak_r = RREG32_PCIE(ixPCIE_RX_NUM_NAK); RREG32_PCIE 1820 drivers/gpu/drm/amd/amdgpu/cik.c nak_g = RREG32_PCIE(ixPCIE_RX_NUM_NAK_GENERATED); RREG32_PCIE 838 drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c orig = data = RREG32_PCIE(ixPCIE_CNTL2); RREG32_PCIE 192 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c def = data = RREG32_PCIE(smnCPM_CONTROL); RREG32_PCIE 218 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c def = data = RREG32_PCIE(smnPCIE_CNTL2); RREG32_PCIE 239 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c data = RREG32_PCIE(smnCPM_CONTROL); RREG32_PCIE 244 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c data = RREG32_PCIE(smnPCIE_CNTL2); RREG32_PCIE 305 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c def = data = RREG32_PCIE(smnPCIE_CONFIG_CNTL); RREG32_PCIE 150 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c def = data = RREG32_PCIE(smnCPM_CONTROL); RREG32_PCIE 178 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c def = data = RREG32_PCIE(smnPCIE_CNTL2); RREG32_PCIE 199 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c data = RREG32_PCIE(smnCPM_CONTROL); RREG32_PCIE 204 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c data = RREG32_PCIE(smnPCIE_CNTL2); RREG32_PCIE 265 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c def = data = RREG32_PCIE(smnPCIE_CONFIG_CNTL); RREG32_PCIE 272 drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c def = data = RREG32_PCIE(smnPCIE_CI_CNTL); RREG32_PCIE 163 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c def = data = RREG32_PCIE(smnNBIF_MGCG_CTRL_LCLK); RREG32_PCIE 201 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c def = data = RREG32_PCIE(smnPCIE_CNTL2); RREG32_PCIE 222 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c data = RREG32_PCIE(smnCPM_CONTROL); RREG32_PCIE 227 drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c data = RREG32_PCIE(smnPCIE_CNTL2); RREG32_PCIE 202 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c def = data = RREG32_PCIE(smnPCIE_CNTL2); RREG32_PCIE 223 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c data = RREG32_PCIE(smnCPM_CONTROL); RREG32_PCIE 228 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c data = RREG32_PCIE(smnPCIE_CNTL2); RREG32_PCIE 311 drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c def = data = RREG32_PCIE(smnPCIE_CI_CNTL); RREG32_PCIE 598 drivers/gpu/drm/amd/amdgpu/psp_v3_1.c reg = RREG32_PCIE(smnMP1_FIRMWARE_FLAGS | 0x03b00000); RREG32_PCIE 1376 drivers/gpu/drm/amd/amdgpu/si.c tmp = RREG32_PCIE(ixPCIE_PERF_CNTL_TXCLK); RREG32_PCIE 1381 drivers/gpu/drm/amd/amdgpu/si.c *count0 = RREG32_PCIE(ixPCIE_PERF_COUNT0_TXCLK) | (cnt0_of << 32); RREG32_PCIE 1382 drivers/gpu/drm/amd/amdgpu/si.c *count1 = RREG32_PCIE(ixPCIE_PERF_COUNT1_TXCLK) | (cnt1_of << 32); RREG32_PCIE 1390 drivers/gpu/drm/amd/amdgpu/si.c nak_r = RREG32_PCIE(ixPCIE_RX_NUM_NAK); RREG32_PCIE 1391 drivers/gpu/drm/amd/amdgpu/si.c nak_g = RREG32_PCIE(ixPCIE_RX_NUM_NAK_GENERATED); RREG32_PCIE 1694 drivers/gpu/drm/amd/amdgpu/si.c tmp = RREG32_PCIE(PCIE_LC_STATUS1); RREG32_PCIE 1847 drivers/gpu/drm/amd/amdgpu/si.c orig = data = RREG32_PCIE(PCIE_P_CNTL); RREG32_PCIE 2010 drivers/gpu/drm/amd/amdgpu/si.c orig = data = RREG32_PCIE(PCIE_CNTL2); RREG32_PCIE 2018 drivers/gpu/drm/amd/amdgpu/si.c data = RREG32_PCIE(PCIE_LC_STATUS1); RREG32_PCIE 870 drivers/gpu/drm/amd/amdgpu/soc15.c tmp = RREG32_PCIE(smnPCIE_PERF_CNTL_TXCLK); RREG32_PCIE 875 drivers/gpu/drm/amd/amdgpu/soc15.c *count0 = RREG32_PCIE(smnPCIE_PERF_COUNT0_TXCLK) | (cnt0_of << 32); RREG32_PCIE 876 drivers/gpu/drm/amd/amdgpu/soc15.c *count1 = RREG32_PCIE(smnPCIE_PERF_COUNT1_TXCLK) | (cnt1_of << 32); RREG32_PCIE 919 drivers/gpu/drm/amd/amdgpu/soc15.c tmp = RREG32_PCIE(smnPCIE_PERF_CNTL_TXCLK3); RREG32_PCIE 924 drivers/gpu/drm/amd/amdgpu/soc15.c *count0 = RREG32_PCIE(smnPCIE_PERF_COUNT0_TXCLK3) | (cnt0_of << 32); RREG32_PCIE 925 drivers/gpu/drm/amd/amdgpu/soc15.c *count1 = RREG32_PCIE(smnPCIE_PERF_COUNT1_TXCLK3) | (cnt1_of << 32); RREG32_PCIE 956 drivers/gpu/drm/amd/amdgpu/soc15.c nak_r = RREG32_PCIE(smnPCIE_RX_NUM_NAK); RREG32_PCIE 957 drivers/gpu/drm/amd/amdgpu/soc15.c nak_g = RREG32_PCIE(smnPCIE_RX_NUM_NAK_GENERATED); RREG32_PCIE 988 drivers/gpu/drm/amd/amdgpu/vi.c tmp = RREG32_PCIE(ixPCIE_PERF_CNTL_TXCLK); RREG32_PCIE 993 drivers/gpu/drm/amd/amdgpu/vi.c *count0 = RREG32_PCIE(ixPCIE_PERF_COUNT0_TXCLK) | (cnt0_of << 32); RREG32_PCIE 994 drivers/gpu/drm/amd/amdgpu/vi.c *count1 = RREG32_PCIE(ixPCIE_PERF_COUNT1_TXCLK) | (cnt1_of << 32); RREG32_PCIE 1002 drivers/gpu/drm/amd/amdgpu/vi.c nak_r = RREG32_PCIE(ixPCIE_RX_NUM_NAK); RREG32_PCIE 1003 drivers/gpu/drm/amd/amdgpu/vi.c nak_g = RREG32_PCIE(ixPCIE_RX_NUM_NAK_GENERATED); RREG32_PCIE 1362 drivers/gpu/drm/amd/amdgpu/vi.c temp = data = RREG32_PCIE(ixPCIE_CNTL2); RREG32_PCIE 1625 drivers/gpu/drm/amd/amdgpu/vi.c data = RREG32_PCIE(ixPCIE_CNTL2); RREG32_PCIE 3355 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c current_gen_speed = (RREG32_PCIE(smnPCIE_LC_SPEED_CNTL) & RREG32_PCIE 3358 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c current_lane_width = (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) & RREG32_PCIE 309 drivers/gpu/drm/amd/powerplay/navi10_ppt.c mp0_fw_intf = RREG32_PCIE(MP0_Public | RREG32_PCIE 233 drivers/gpu/drm/amd/powerplay/smu_v11_0.c mp1_fw_flags = RREG32_PCIE(MP1_Public | RREG32_PCIE 252 drivers/gpu/drm/amd/powerplay/smu_v11_0.c mp1_fw_flags = RREG32_PCIE(MP1_Public | RREG32_PCIE 140 drivers/gpu/drm/amd/powerplay/smu_v12_0.c mp1_fw_flags = RREG32_PCIE(MP1_Public | RREG32_PCIE 43 drivers/gpu/drm/amd/powerplay/smumgr/smu9_smumgr.c mp1_fw_flags = RREG32_PCIE(MP1_Public | RREG32_PCIE 52 drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c mp1_fw_flags = RREG32_PCIE(MP1_Public | RREG32_PCIE 1060 drivers/gpu/drm/amd/powerplay/vega20_ppt.c gen_speed = (RREG32_PCIE(smnPCIE_LC_SPEED_CNTL) & RREG32_PCIE 1063 drivers/gpu/drm/amd/powerplay/vega20_ppt.c lane_width = (RREG32_PCIE(smnPCIE_LC_LINK_WIDTH_CNTL) & RREG32_PCIE 95 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); RREG32_PCIE 97 drivers/gpu/drm/radeon/r300.c (void)RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); RREG32_PCIE 181 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); RREG32_PCIE 201 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); RREG32_PCIE 539 drivers/gpu/drm/radeon/r300.c link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); RREG32_PCIE 555 drivers/gpu/drm/radeon/r300.c link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); RREG32_PCIE 557 drivers/gpu/drm/radeon/r300.c link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); RREG32_PCIE 573 drivers/gpu/drm/radeon/r300.c link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL); RREG32_PCIE 600 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); RREG32_PCIE 602 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_BASE); RREG32_PCIE 604 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_LO); RREG32_PCIE 606 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_HI); RREG32_PCIE 608 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_LO); RREG32_PCIE 610 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_HI); RREG32_PCIE 612 drivers/gpu/drm/radeon/r300.c tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_ERROR); RREG32_PCIE 130 drivers/gpu/drm/radeon/rv6xx_dpm.c tmp = RREG32_PCIE(PCIE_P_CNTL); RREG32_PCIE 121 drivers/gpu/drm/radeon/rv770_dpm.c tmp = RREG32_PCIE(PCIE_P_CNTL); RREG32_PCIE 5572 drivers/gpu/drm/radeon/si.c orig = data = RREG32_PCIE(PCIE_CNTL2); RREG32_PCIE 7156 drivers/gpu/drm/radeon/si.c tmp = RREG32_PCIE(PCIE_LC_STATUS1); RREG32_PCIE 7271 drivers/gpu/drm/radeon/si.c orig = data = RREG32_PCIE(PCIE_P_CNTL); RREG32_PCIE 7434 drivers/gpu/drm/radeon/si.c orig = data = RREG32_PCIE(PCIE_CNTL2); RREG32_PCIE 7442 drivers/gpu/drm/radeon/si.c data = RREG32_PCIE(PCIE_LC_STATUS1);