RLC_CNTL         1840 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	tmp = REG_SET_FIELD(tmp, RLC_CNTL, RLC_ENABLE_F32, 0);
RLC_CNTL         1881 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);
RLC_CNTL         4058 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 	return (REG_GET_FIELD(rlc_cntl, RLC_CNTL, RLC_ENABLE_F32)) ? true : false;
RLC_CNTL         4104 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 0);
RLC_CNTL         4121 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 	WREG32_FIELD(RLC_CNTL, RLC_ENABLE_F32, 1);
RLC_CNTL         2949 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 0);
RLC_CNTL         2968 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c 	WREG32_FIELD15(GC, 0, RLC_CNTL, RLC_ENABLE_F32, 1);
RLC_CNTL         5825 drivers/gpu/drm/radeon/cik.c 	tmp = RREG32(RLC_CNTL);
RLC_CNTL         5827 drivers/gpu/drm/radeon/cik.c 		WREG32(RLC_CNTL, rlc);
RLC_CNTL         5834 drivers/gpu/drm/radeon/cik.c 	orig = data = RREG32(RLC_CNTL);
RLC_CNTL         5840 drivers/gpu/drm/radeon/cik.c 		WREG32(RLC_CNTL, data);
RLC_CNTL         5892 drivers/gpu/drm/radeon/cik.c 	WREG32(RLC_CNTL, 0);
RLC_CNTL         5908 drivers/gpu/drm/radeon/cik.c 	WREG32(RLC_CNTL, RLC_ENABLE);
RLC_CNTL         4378 drivers/gpu/drm/radeon/evergreen.c 	WREG32(RLC_CNTL, mask);
RLC_CNTL         1705 drivers/gpu/drm/radeon/r600.c 	WREG32(RLC_CNTL, 0);
RLC_CNTL         1837 drivers/gpu/drm/radeon/r600.c 	WREG32(RLC_CNTL, 0);
RLC_CNTL         3546 drivers/gpu/drm/radeon/r600.c 	WREG32(RLC_CNTL, 0);
RLC_CNTL         3551 drivers/gpu/drm/radeon/r600.c 	WREG32(RLC_CNTL, RLC_ENABLE);
RLC_CNTL         5209 drivers/gpu/drm/radeon/si.c 	orig = data = RREG32(RLC_CNTL);
RLC_CNTL         5213 drivers/gpu/drm/radeon/si.c 		WREG32(RLC_CNTL, data);
RLC_CNTL         5225 drivers/gpu/drm/radeon/si.c 	tmp = RREG32(RLC_CNTL);
RLC_CNTL         5227 drivers/gpu/drm/radeon/si.c 		WREG32(RLC_CNTL, rlc);
RLC_CNTL         5821 drivers/gpu/drm/radeon/si.c 	WREG32(RLC_CNTL, 0);
RLC_CNTL         5830 drivers/gpu/drm/radeon/si.c 	WREG32(RLC_CNTL, RLC_ENABLE);