RK3368_PLL_CON 130 drivers/clk/rockchip/clk-rk3368.c [apllb] = PLL(pll_rk3066, PLL_APLLB, "apllb", mux_pll_p, 0, RK3368_PLL_CON(0), RK3368_PLL_CON 131 drivers/clk/rockchip/clk-rk3368.c RK3368_PLL_CON(3), 8, 1, 0, rk3368_pll_rates), RK3368_PLL_CON 132 drivers/clk/rockchip/clk-rk3368.c [aplll] = PLL(pll_rk3066, PLL_APLLL, "aplll", mux_pll_p, 0, RK3368_PLL_CON(4), RK3368_PLL_CON 133 drivers/clk/rockchip/clk-rk3368.c RK3368_PLL_CON(7), 8, 0, 0, rk3368_pll_rates), RK3368_PLL_CON 134 drivers/clk/rockchip/clk-rk3368.c [dpll] = PLL(pll_rk3066, PLL_DPLL, "dpll", mux_pll_p, 0, RK3368_PLL_CON(8), RK3368_PLL_CON 135 drivers/clk/rockchip/clk-rk3368.c RK3368_PLL_CON(11), 8, 2, 0, NULL), RK3368_PLL_CON 136 drivers/clk/rockchip/clk-rk3368.c [cpll] = PLL(pll_rk3066, PLL_CPLL, "cpll", mux_pll_p, 0, RK3368_PLL_CON(12), RK3368_PLL_CON 137 drivers/clk/rockchip/clk-rk3368.c RK3368_PLL_CON(15), 8, 3, ROCKCHIP_PLL_SYNC_RATE, rk3368_pll_rates), RK3368_PLL_CON 138 drivers/clk/rockchip/clk-rk3368.c [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16), RK3368_PLL_CON 139 drivers/clk/rockchip/clk-rk3368.c RK3368_PLL_CON(19), 8, 4, ROCKCHIP_PLL_SYNC_RATE, rk3368_pll_rates), RK3368_PLL_CON 140 drivers/clk/rockchip/clk-rk3368.c [npll] = PLL(pll_rk3066, PLL_NPLL, "npll", mux_pll_p, 0, RK3368_PLL_CON(20), RK3368_PLL_CON 141 drivers/clk/rockchip/clk-rk3368.c RK3368_PLL_CON(23), 8, 5, ROCKCHIP_PLL_SYNC_RATE, rk3368_pll_rates),