A_P               120 arch/powerpc/xmon/spu-dis.c 	  if (arg != A_P && !paren && i > 1)
A_P               149 arch/powerpc/xmon/spu-dis.c 	    case A_P:
A_P               227 arch/powerpc/xmon/spu-dis.c 	  if (arg != A_P && paren)
A_P               151 arch/powerpc/xmon/spu-insns.h APUOP(M_LQD,		RI10,	0x1a0,	"lqd",		_A4(A_T,A_S14,A_P,A_A),	00012,	LS)	/* LoadQDisp     RT<-M[Ra+I10] */
A_P               166 arch/powerpc/xmon/spu-insns.h APUOP(M_CBD,		RI7,	0x1f4,	"cbd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT<-sta(Ra+I4,siz) */
A_P               167 arch/powerpc/xmon/spu-insns.h APUOP(M_CHD,		RI7,	0x1f5,	"chd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT<-sta(Ra+I4,siz) */
A_P               168 arch/powerpc/xmon/spu-insns.h APUOP(M_CWD,		RI7,	0x1f6,	"cwd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT<-sta(Ra+I4,siz) */
A_P               169 arch/powerpc/xmon/spu-insns.h APUOP(M_CDD,		RI7,	0x1f7,	"cdd",		_A4(A_T,A_U7,A_P,A_A),	00012,	SHUF)	/* genCtl%%insD  RT<-sta(Ra+I4,siz) */
A_P               176 arch/powerpc/xmon/spu-insns.h APUOP(M_STQD,		RI10,	0x120,	"stqd",		_A4(A_T,A_S14,A_P,A_A),	00011,	LS)	/* SToreQDisp    M[Ra+I10]<-RT */