RING_TIMESTAMP   1654 drivers/gpu/drm/i915/gvt/handlers.c 	    offset == i915_mmio_reg_offset(RING_TIMESTAMP(ring_base)) ||
RING_TIMESTAMP   1915 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_RING_DFH(RING_TIMESTAMP, D_ALL, F_CMD_ACCESS,
RING_TIMESTAMP    603 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
RING_TIMESTAMP    615 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
RING_TIMESTAMP    631 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
RING_TIMESTAMP    661 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
RING_TIMESTAMP    662 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
RING_TIMESTAMP    664 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
RING_TIMESTAMP    668 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, RENDER_RING_BASE),
RING_TIMESTAMP    669 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, BSD_RING_BASE),
RING_TIMESTAMP    671 drivers/gpu/drm/i915/i915_cmd_parser.c 	REG64_IDX(RING_TIMESTAMP, BLT_RING_BASE),
RING_TIMESTAMP   1808 drivers/gpu/drm/i915/intel_uncore.c 	.offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),