RING_SPACE       1118 drivers/gpu/drm/nouveau/dispnv04/crtc.c 	ret = RING_SPACE(chan, 2);
RING_SPACE       1201 drivers/gpu/drm/nouveau/dispnv04/crtc.c 		ret = RING_SPACE(chan, 8);
RING_SPACE        741 drivers/gpu/drm/nouveau/nouveau_bo.c 	int ret = RING_SPACE(chan, 2);
RING_SPACE        755 drivers/gpu/drm/nouveau/nouveau_bo.c 	int ret = RING_SPACE(chan, 10);
RING_SPACE        774 drivers/gpu/drm/nouveau/nouveau_bo.c 	int ret = RING_SPACE(chan, 2);
RING_SPACE        796 drivers/gpu/drm/nouveau/nouveau_bo.c 		ret = RING_SPACE(chan, 11);
RING_SPACE        834 drivers/gpu/drm/nouveau/nouveau_bo.c 		ret = RING_SPACE(chan, 12);
RING_SPACE        873 drivers/gpu/drm/nouveau/nouveau_bo.c 		ret = RING_SPACE(chan, 11);
RING_SPACE        902 drivers/gpu/drm/nouveau/nouveau_bo.c 	int ret = RING_SPACE(chan, 7);
RING_SPACE        920 drivers/gpu/drm/nouveau/nouveau_bo.c 	int ret = RING_SPACE(chan, 7);
RING_SPACE        936 drivers/gpu/drm/nouveau/nouveau_bo.c 	int ret = RING_SPACE(chan, 6);
RING_SPACE        964 drivers/gpu/drm/nouveau/nouveau_bo.c 		ret = RING_SPACE(chan, 18 + 6 * (src_tiled + dst_tiled));
RING_SPACE       1025 drivers/gpu/drm/nouveau/nouveau_bo.c 	int ret = RING_SPACE(chan, 4);
RING_SPACE       1054 drivers/gpu/drm/nouveau/nouveau_bo.c 	ret = RING_SPACE(chan, 3);
RING_SPACE       1066 drivers/gpu/drm/nouveau/nouveau_bo.c 		ret = RING_SPACE(chan, 11);
RING_SPACE        445 drivers/gpu/drm/nouveau/nouveau_chan.c 	ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
RING_SPACE        460 drivers/gpu/drm/nouveau/nouveau_chan.c 		ret = RING_SPACE(chan, 2);
RING_SPACE        426 drivers/gpu/drm/nouveau/nouveau_dmem.c 	ret = RING_SPACE(chan, 13);
RING_SPACE        370 drivers/gpu/drm/nouveau/nouveau_drm.c 			ret = RING_SPACE(drm->channel, 2);
RING_SPACE        791 drivers/gpu/drm/nouveau/nouveau_gem.c 		ret = RING_SPACE(chan, req->nr_push * 2);
RING_SPACE        805 drivers/gpu/drm/nouveau/nouveau_gem.c 		ret = RING_SPACE(chan, req->nr_push * (2 + NOUVEAU_DMA_SKIPS));
RING_SPACE         37 drivers/gpu/drm/nouveau/nv04_fbcon.c 	ret = RING_SPACE(chan, 4);
RING_SPACE         57 drivers/gpu/drm/nouveau/nv04_fbcon.c 	ret = RING_SPACE(chan, 7);
RING_SPACE         91 drivers/gpu/drm/nouveau/nv04_fbcon.c 	ret = RING_SPACE(chan, 8);
RING_SPACE        118 drivers/gpu/drm/nouveau/nv04_fbcon.c 		ret = RING_SPACE(chan, iter_len + 1);
RING_SPACE        203 drivers/gpu/drm/nouveau/nv04_fbcon.c 	if (RING_SPACE(chan, 49 + (device->info.chipset >= 0x11 ? 4 : 0))) {
RING_SPACE         43 drivers/gpu/drm/nouveau/nv04_fence.c 	int ret = RING_SPACE(chan, 2);
RING_SPACE         33 drivers/gpu/drm/nouveau/nv10_fence.c 	int ret = RING_SPACE(chan, 2);
RING_SPACE         51 drivers/gpu/drm/nouveau/nv17_fence.c 	ret = RING_SPACE(prev, 5);
RING_SPACE         61 drivers/gpu/drm/nouveau/nv17_fence.c 	if (!ret && !(ret = RING_SPACE(chan, 5))) {
RING_SPACE         38 drivers/gpu/drm/nouveau/nv50_fbcon.c 	ret = RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11);
RING_SPACE         73 drivers/gpu/drm/nouveau/nv50_fbcon.c 	ret = RING_SPACE(chan, 12);
RING_SPACE        107 drivers/gpu/drm/nouveau/nv50_fbcon.c 	ret = RING_SPACE(chan, 11);
RING_SPACE        133 drivers/gpu/drm/nouveau/nv50_fbcon.c 		ret = RING_SPACE(chan, push + 1);
RING_SPACE        190 drivers/gpu/drm/nouveau/nv50_fbcon.c 	ret = RING_SPACE(chan, 58);
RING_SPACE         35 drivers/gpu/drm/nouveau/nv84_fence.c 	int ret = RING_SPACE(chan, 8);
RING_SPACE         53 drivers/gpu/drm/nouveau/nv84_fence.c 	int ret = RING_SPACE(chan, 7);
RING_SPACE         38 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	ret = RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11);
RING_SPACE         73 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	ret = RING_SPACE(chan, 12);
RING_SPACE        107 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	ret = RING_SPACE(chan, 11);
RING_SPACE        133 drivers/gpu/drm/nouveau/nvc0_fbcon.c 		ret = RING_SPACE(chan, push + 1);
RING_SPACE        190 drivers/gpu/drm/nouveau/nvc0_fbcon.c 	ret = RING_SPACE(chan, 58);
RING_SPACE         34 drivers/gpu/drm/nouveau/nvc0_fence.c 	int ret = RING_SPACE(chan, 6);
RING_SPACE         50 drivers/gpu/drm/nouveau/nvc0_fence.c 	int ret = RING_SPACE(chan, 5);