A_BCM1480_IMR_CPU0_BASE  361 arch/mips/include/asm/sibyte/bcm1480_regs.h #define A_BCM1480_IMR_MAPPER(cpu)	(A_BCM1480_IMR_CPU0_BASE+(cpu)*BCM1480_IMR_REGISTER_SPACING)
A_BCM1480_IMR_CPU0_BASE  418 arch/mips/include/asm/sibyte/bcm1480_regs.h     (A_BCM1480_IMR_CPU0_BASE + \
A_BCM1480_IMR_CPU0_BASE   26 arch/mips/sibyte/bcm1480/smp.c 	IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
A_BCM1480_IMR_CPU0_BASE   33 arch/mips/sibyte/bcm1480/smp.c 	IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
A_BCM1480_IMR_CPU0_BASE   40 arch/mips/sibyte/bcm1480/smp.c 	IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),