AZX_GCTL_RESET    365 sound/hda/hdac_controller.c 	snd_hdac_chip_updatel(bus, GCTL, AZX_GCTL_RESET, 0);
AZX_GCTL_RESET    368 sound/hda/hdac_controller.c 	while ((snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET) &&
AZX_GCTL_RESET    384 sound/hda/hdac_controller.c 	snd_hdac_chip_updateb(bus, GCTL, AZX_GCTL_RESET, AZX_GCTL_RESET);
AZX_GCTL_RESET    199 sound/soc/intel/skylake/skl.c 	if (!(snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET)) {