REG_WRITE 172 arch/x86/mm/mmio-mod.c case REG_WRITE: REG_WRITE 140 arch/x86/mm/pf_in.c CHECK_OP_TYPE(opcode, reg_wop, REG_WRITE); REG_WRITE 74 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c REG_WRITE(MP1_SMN_C2PMSG_91, 0); REG_WRITE 77 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c REG_WRITE(MP1_SMN_C2PMSG_83, param); REG_WRITE 80 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr_vbios_smu.c REG_WRITE(MP1_SMN_C2PMSG_67, msg_id); REG_WRITE 59 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c REG_WRITE(MP1_SMN_C2PMSG_91, 0); REG_WRITE 62 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c REG_WRITE(MP1_SMN_C2PMSG_83, param); REG_WRITE 65 drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c REG_WRITE(MP1_SMN_C2PMSG_67, msg_id); REG_WRITE 70 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(MASTER_COMM_DATA_REG1, rampingBoundary); REG_WRITE 228 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(MASTER_COMM_DATA_REG1, frame_ramp); REG_WRITE 244 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(BIOS_SCRATCH_2, s2); REG_WRITE 256 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x103); REG_WRITE 257 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x101); REG_WRITE 258 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x103); REG_WRITE 259 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x101); REG_WRITE 260 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x101); REG_WRITE 367 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(BL_PWM_CNTL, REG_WRITE 369 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(BL_PWM_CNTL2, REG_WRITE 371 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(BL_PWM_PERIOD_CNTL, REG_WRITE 381 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(BL_PWM_CNTL, 0xC000FA00); REG_WRITE 382 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(BL_PWM_PERIOD_CNTL, 0x000C0FA0); REG_WRITE 402 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c REG_WRITE(BIOS_SCRATCH_2, value); REG_WRITE 571 drivers/gpu/drm/amd/display/dc/dce/dce_audio.c REG_WRITE(AZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS, REG_WRITE 120 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c REG_WRITE(AUX_CONTROL, value); REG_WRITE 134 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c REG_WRITE(AUX_CONTROL, value); REG_WRITE 915 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c REG_WRITE(PHASE[inst], clock_100hz); REG_WRITE 916 drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c REG_WRITE(MODULO[inst], dp_dto_ref_100hz); REG_WRITE 83 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(DMCU_IRAM_WR_CTRL, start_offset); REG_WRITE 86 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(DMCU_IRAM_WR_DATA, src[count]); REG_WRITE 108 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(DMCU_IRAM_RD_CTRL, psr_state_offset); REG_WRITE 335 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(DMCU_IRAM_RD_CTRL, dmcu_version_offset); REG_WRITE 357 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(MASTER_COMM_DATA_REG1, fractional_pwm); REG_WRITE 392 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(MASTER_COMM_DATA_REG1, 0xFFFF); REG_WRITE 395 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(MASTER_COMM_DATA_REG2, abm_gain_stepsize); REG_WRITE 455 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(DMCU_IRAM_WR_CTRL, start_offset); REG_WRITE 458 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(DMCU_IRAM_WR_DATA, src[count]); REG_WRITE 497 drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c REG_WRITE(DMCU_IRAM_RD_CTRL, psr_state_offset); REG_WRITE 83 drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.c REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); REG_WRITE 244 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_WRITE(DP_DPHY_TRAINING_PATTERN_SEL, index); REG_WRITE 284 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c REG_WRITE(DP_DPHY_INTERNAL_CTRL, value); REG_WRITE 296 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_WRITE(FMT_TEMPORAL_DITHER_PATTERN_CONTROL, 0); REG_WRITE 298 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_WRITE(FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX, 0); REG_WRITE 300 drivers/gpu/drm/amd/display/dc/dce/dce_opp.c REG_WRITE(FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX, 0); REG_WRITE 124 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_GENERIC_0, *content++); REG_WRITE 125 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_GENERIC_1, *content++); REG_WRITE 126 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_GENERIC_2, *content++); REG_WRITE 127 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_GENERIC_3, *content++); REG_WRITE 128 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_GENERIC_4, *content++); REG_WRITE 129 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_GENERIC_5, *content++); REG_WRITE 130 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_GENERIC_6, *content++); REG_WRITE 131 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_GENERIC_7, *content); REG_WRITE 462 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(DP_MSA_MISC, misc1); /* MSA_MISC1 */ REG_WRITE 756 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_AVI_INFO0, content[0]); REG_WRITE 758 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_AVI_INFO1, content[1]); REG_WRITE 760 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_AVI_INFO2, content[2]); REG_WRITE 762 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c REG_WRITE(AFMT_AVI_INFO3, content[3]); REG_WRITE 232 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(DCFE_MEM_PWR_CTRL, power_ctl); REG_WRITE 301 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(SCL_AUTOMATIC_MODE_CONTROL, 0); REG_WRITE 336 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(SCL_F_SHARP_CONTROL, 0); REG_WRITE 1184 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(REGAMMA_LUT_INDEX, 0); REG_WRITE 1189 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(REGAMMA_LUT_DATA, rgb->red_reg); REG_WRITE 1190 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(REGAMMA_LUT_DATA, rgb->green_reg); REG_WRITE 1191 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(REGAMMA_LUT_DATA, rgb->blue_reg); REG_WRITE 1192 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(REGAMMA_LUT_DATA, rgb->delta_red_reg); REG_WRITE 1193 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(REGAMMA_LUT_DATA, rgb->delta_green_reg); REG_WRITE 1194 drivers/gpu/drm/amd/display/dc/dce/dce_transform.c REG_WRITE(REGAMMA_LUT_DATA, rgb->delta_blue_reg); REG_WRITE 245 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_WRITE(DCHUBBUB_TEST_DEBUG_INDEX, hubbub1->debug_test_index_pstate); REG_WRITE 330 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A, prog_wm_value); REG_WRITE 353 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B, prog_wm_value); REG_WRITE 376 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C, prog_wm_value); REG_WRITE 399 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D, prog_wm_value); REG_WRITE 138 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c REG_WRITE(HUBPREQ_DEBUG_DB, value); REG_WRITE 480 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(D1VGA_CONTROL, 0); REG_WRITE 481 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(D2VGA_CONTROL, 0); REG_WRITE 482 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(D3VGA_CONTROL, 0); REG_WRITE 483 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(D4VGA_CONTROL, 0); REG_WRITE 1193 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(REFCLK_CNTL, 0); REG_WRITE 1195 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(DIO_MEM_PWR_CTRL, 0); REG_WRITE 1199 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0); REG_WRITE 1201 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(DCCG_GATE_DISABLE_CNTL2, 0); REG_WRITE 1291 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(DIO_MEM_PWR_CTRL, 0); REG_WRITE 1295 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0); REG_WRITE 1297 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c REG_WRITE(DCCG_GATE_DISABLE_CNTL2, 0); REG_WRITE 216 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_WRITE(DP_DPHY_TRAINING_PATTERN_SEL, index); REG_WRITE 253 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c REG_WRITE(DP_DPHY_INTERNAL_CTRL, value); REG_WRITE 664 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WRITE(OTG_TRIGA_CNTL, 0); REG_WRITE 1006 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WRITE(OTG_TEST_PATTERN_PARAMETERS, 0); REG_WRITE 1130 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WRITE(OTG_TEST_PATTERN_COLOR, 0); REG_WRITE 1133 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WRITE(OTG_TEST_PATTERN_CONTROL, 0); REG_WRITE 1144 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WRITE(OTG_TEST_PATTERN_CONTROL, 0); REG_WRITE 1145 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WRITE(OTG_TEST_PATTERN_COLOR, 0); REG_WRITE 1146 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WRITE(OTG_TEST_PATTERN_PARAMETERS, 0); REG_WRITE 1417 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c REG_WRITE(OTG_CRC_CNTL, 0); REG_WRITE 111 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_0, *content++); REG_WRITE 112 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_1, *content++); REG_WRITE 113 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_2, *content++); REG_WRITE 114 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_3, *content++); REG_WRITE 115 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_4, *content++); REG_WRITE 116 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_5, *content++); REG_WRITE 117 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_6, *content++); REG_WRITE 118 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_7, *content); REG_WRITE 425 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(DP_MSA_MISC, misc1); /* MSA_MISC1 */ REG_WRITE 813 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_0, *content++); REG_WRITE 814 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_1, *content++); REG_WRITE 815 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_2, *content++); REG_WRITE 816 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_3, *content++); REG_WRITE 817 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_4, *content++); REG_WRITE 818 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_5, *content++); REG_WRITE 819 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_6, *content++); REG_WRITE 820 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c REG_WRITE(AFMT_GENERIC_7, *content); REG_WRITE 174 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_WRITE(HUBPREQ_DEBUG_DB, 1 << 8); REG_WRITE 627 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_WRITE(DMDATA_ADDRESS_LOW, attr->address.low_part); REG_WRITE 665 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c REG_WRITE(DMDATA_SW_DATA, dmdata_sw_data[i]); REG_WRITE 117 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(MICROSECOND_TIME_BASE_DIV, 0x120264); REG_WRITE 126 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(MILLISECOND_TIME_BASE_DIV, 0x1186a0); REG_WRITE 129 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(DISPCLK_FREQ_CHANGE_CNTL, 0x801003c); REG_WRITE 139 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(RBBMIF_TIMEOUT_DIS, 0xFFFFFFFF); REG_WRITE 140 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(RBBMIF_TIMEOUT_DIS_2, 0xFFFFFFFF); REG_WRITE 155 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(REFCLK_CNTL, 0); REG_WRITE 167 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(AZALIA_CONTROLLER_CLOCK_GATING, 0x1); REG_WRITE 173 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(D1VGA_CONTROL, 0); REG_WRITE 174 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(D2VGA_CONTROL, 0); REG_WRITE 175 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(D3VGA_CONTROL, 0); REG_WRITE 176 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(D4VGA_CONTROL, 0); REG_WRITE 177 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(D5VGA_CONTROL, 0); REG_WRITE 178 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(D6VGA_CONTROL, 0); REG_WRITE 2011 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(RBBMIF_TIMEOUT_DIS, 0xFFFFFFFF); REG_WRITE 2012 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(RBBMIF_TIMEOUT_DIS_2, 0xFFFFFFFF); REG_WRITE 2019 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c REG_WRITE(REFCLK_CNTL, 0); REG_WRITE 248 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_WRITE(DPG_CONTROL, 0); REG_WRITE 249 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_WRITE(DPG_COLOUR_R_CR, 0); REG_WRITE 250 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_WRITE(DPG_COLOUR_G_Y, 0); REG_WRITE 251 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_WRITE(DPG_COLOUR_B_CB, 0); REG_WRITE 252 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.c REG_WRITE(DPG_RAMP_CONTROL, 0); REG_WRITE 222 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c REG_WRITE(OTG_H_TIMING_CNTL, 0); REG_WRITE 258 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WRITE(AFMT_GENERIC_0, *content++); REG_WRITE 259 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WRITE(AFMT_GENERIC_1, *content++); REG_WRITE 260 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WRITE(AFMT_GENERIC_2, *content++); REG_WRITE 261 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WRITE(AFMT_GENERIC_3, *content++); REG_WRITE 262 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WRITE(AFMT_GENERIC_4, *content++); REG_WRITE 263 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WRITE(AFMT_GENERIC_5, *content++); REG_WRITE 264 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WRITE(AFMT_GENERIC_6, *content++); REG_WRITE 265 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c REG_WRITE(AFMT_GENERIC_7, *content++); REG_WRITE 199 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c REG_WRITE(HUBPREQ_DEBUG, 1 << 26); REG_WRITE 35 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(vga_reg, VGA_DISP_DISABLE); REG_WRITE 135 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(BLC_PWM_CTL, (blc_pwm_ctl | REG_WRITE 318 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DSPCLK_GATE_D, regs->cdv.saveDSPCLK_GATE_D); REG_WRITE 319 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(RAMCLK_GATE_D, regs->cdv.saveRAMCLK_GATE_D); REG_WRITE 322 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DPIO_CFG, 0); REG_WRITE 323 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DPIO_CFG, DPIO_MODE_SELECT_0 | DPIO_CMN_RESET_N); REG_WRITE 327 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DPLL_A, temp | DPLL_SYNCLOCK_ENABLE); REG_WRITE 333 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DPLL_B, temp | DPLL_SYNCLOCK_ENABLE); REG_WRITE 339 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DSPFW1, regs->cdv.saveDSPFW[0]); REG_WRITE 340 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DSPFW2, regs->cdv.saveDSPFW[1]); REG_WRITE 341 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DSPFW3, regs->cdv.saveDSPFW[2]); REG_WRITE 342 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DSPFW4, regs->cdv.saveDSPFW[3]); REG_WRITE 343 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DSPFW5, regs->cdv.saveDSPFW[4]); REG_WRITE 344 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DSPFW6, regs->cdv.saveDSPFW[5]); REG_WRITE 346 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(DSPARB, regs->cdv.saveDSPARB); REG_WRITE 347 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(ADPA, regs->cdv.saveADPA); REG_WRITE 349 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(BLC_PWM_CTL2, regs->saveBLC_PWM_CTL2); REG_WRITE 350 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(LVDS, regs->cdv.saveLVDS); REG_WRITE 351 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PFIT_CONTROL, regs->cdv.savePFIT_CONTROL); REG_WRITE 352 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PFIT_PGM_RATIOS, regs->cdv.savePFIT_PGM_RATIOS); REG_WRITE 353 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(BLC_PWM_CTL, regs->saveBLC_PWM_CTL); REG_WRITE 354 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PP_ON_DELAYS, regs->cdv.savePP_ON_DELAYS); REG_WRITE 355 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PP_OFF_DELAYS, regs->cdv.savePP_OFF_DELAYS); REG_WRITE 356 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PP_CYCLE, regs->cdv.savePP_CYCLE); REG_WRITE 357 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PP_CONTROL, regs->cdv.savePP_CONTROL); REG_WRITE 359 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(VGACNTRL, regs->cdv.saveVGACNTRL); REG_WRITE 361 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PSB_INT_ENABLE_R, regs->cdv.saveIER); REG_WRITE 362 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PSB_INT_MASK_R, regs->cdv.saveIMR); REG_WRITE 438 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT)); REG_WRITE 448 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PORT_HOTPLUG_EN, hotplug); REG_WRITE 450 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PORT_HOTPLUG_EN, 0); REG_WRITE 451 drivers/gpu/drm/gma500/cdv_device.c REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT)); REG_WRITE 64 drivers/gpu/drm/gma500/cdv_intel_crt.c REG_WRITE(reg, temp); REG_WRITE 109 drivers/gpu/drm/gma500/cdv_intel_crt.c REG_WRITE(dpll_md_reg, REG_WRITE 124 drivers/gpu/drm/gma500/cdv_intel_crt.c REG_WRITE(adpa_reg, adpa); REG_WRITE 158 drivers/gpu/drm/gma500/cdv_intel_crt.c REG_WRITE(PORT_HOTPLUG_EN, hotplug_en); REG_WRITE 174 drivers/gpu/drm/gma500/cdv_intel_crt.c REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); REG_WRITE 177 drivers/gpu/drm/gma500/cdv_intel_crt.c REG_WRITE(PORT_HOTPLUG_EN, orig); REG_WRITE 139 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(SB_ADDR, reg); REG_WRITE 140 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(SB_PCKT, REG_WRITE 174 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(SB_ADDR, reg); REG_WRITE 175 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(SB_DATA, val); REG_WRITE 176 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(SB_PCKT, REG_WRITE 201 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DPIO_CFG, 0); REG_WRITE 203 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DPIO_CFG, DPIO_MODE_SELECT_0 | DPIO_CMN_RESET_N); REG_WRITE 226 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS); REG_WRITE 472 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(FW_BLC_SELF, (REG_READ(FW_BLC_SELF) & ~FW_BLC_SELF_EN)); REG_WRITE 480 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(OV_OVADD, 0/*dev_priv->ovl_offset*/); REG_WRITE 502 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW1, fw); REG_WRITE 509 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW2, fw); REG_WRITE 511 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW3, 0x36000000); REG_WRITE 518 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW5, 0x00040330); REG_WRITE 524 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW5, fw); REG_WRITE 527 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW6, 0x10); REG_WRITE 532 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); REG_WRITE 539 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW1, 0x3f880808); REG_WRITE 540 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW2, 0x0b020202); REG_WRITE 541 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW3, 0x24000000); REG_WRITE 542 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW4, 0x08030202); REG_WRITE 543 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW5, 0x01010101); REG_WRITE 544 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(DSPFW6, 0x1d0); REG_WRITE 674 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(PIPE_GMCH_DATA_M(pipe), 0); REG_WRITE 675 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(PIPE_GMCH_DATA_N(pipe), 0); REG_WRITE 676 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(PIPE_DP_LINK_M(pipe), 0); REG_WRITE 677 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(PIPE_DP_LINK_N(pipe), 0); REG_WRITE 726 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE); REG_WRITE 758 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(LVDS, lvds); REG_WRITE 766 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(PFIT_CONTROL, 0); REG_WRITE 771 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->dpll, REG_WRITE 784 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->dpll_md, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT)); REG_WRITE 787 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) | REG_WRITE 789 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | REG_WRITE 791 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | REG_WRITE 793 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) | REG_WRITE 795 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->vblank, (adjusted_mode->crtc_vblank_start - 1) | REG_WRITE 797 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->vsync, (adjusted_mode->crtc_vsync_start - 1) | REG_WRITE 802 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->size, REG_WRITE 804 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->pos, 0); REG_WRITE 805 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->src, REG_WRITE 807 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->conf, pipeconf); REG_WRITE 812 drivers/gpu/drm/gma500/cdv_intel_display.c REG_WRITE(map->cntr, dspcntr); REG_WRITE 394 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PP_CONTROL, pp); REG_WRITE 408 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PP_CONTROL, pp); REG_WRITE 428 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PP_CONTROL, pp); REG_WRITE 461 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PP_CONTROL, pp); REG_WRITE 489 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PP_CONTROL, pp); REG_WRITE 505 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PP_CONTROL, pp); REG_WRITE 606 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(ch_data + i, REG_WRITE 610 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(ch_ctl, REG_WRITE 627 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(ch_ctl, REG_WRITE 1029 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PIPE_GMCH_DATA_M(pipe), REG_WRITE 1032 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PIPE_GMCH_DATA_N(pipe), m_n.gmch_n); REG_WRITE 1033 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PIPE_DP_LINK_M(pipe), m_n.link_m); REG_WRITE 1034 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PIPE_DP_LINK_N(pipe), m_n.link_n); REG_WRITE 1089 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, (intel_dp->DP | DP_PORT_EN)); REG_WRITE 1103 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PFIT_CONTROL, pfit_control); REG_WRITE 1394 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, dp_reg_value); REG_WRITE 1516 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, reg); REG_WRITE 1672 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, reg); REG_WRITE 1693 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE); REG_WRITE 1699 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); REG_WRITE 1989 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(DSPCLK_GATE_D, reg_value); REG_WRITE 2074 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(PP_CONTROL, pp_on); REG_WRITE 2078 drivers/gpu/drm/gma500/cdv_intel_dp.c REG_WRITE(BLC_PWM_CTL2, pwm_ctrl); REG_WRITE 89 drivers/gpu/drm/gma500/cdv_intel_hdmi.c REG_WRITE(hdmi_priv->hdmi_reg, hdmib); REG_WRITE 103 drivers/gpu/drm/gma500/cdv_intel_hdmi.c REG_WRITE(hdmi_priv->hdmi_reg, hdmib & ~HDMIB_PORT_EN); REG_WRITE 105 drivers/gpu/drm/gma500/cdv_intel_hdmi.c REG_WRITE(hdmi_priv->hdmi_reg, hdmib | HDMIB_PORT_EN); REG_WRITE 124 drivers/gpu/drm/gma500/cdv_intel_hdmi.c REG_WRITE(hdmi_priv->hdmi_reg, hdmi_priv->save_HDMIB); REG_WRITE 132 drivers/gpu/drm/gma500/cdv_intel_lvds.c REG_WRITE(BLC_PWM_CTL, REG_WRITE 171 drivers/gpu/drm/gma500/cdv_intel_lvds.c REG_WRITE(BLC_PWM_CTL, REG_WRITE 196 drivers/gpu/drm/gma500/cdv_intel_lvds.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | REG_WRITE 207 drivers/gpu/drm/gma500/cdv_intel_lvds.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & REG_WRITE 372 drivers/gpu/drm/gma500/cdv_intel_lvds.c REG_WRITE(PFIT_CONTROL, pfit_control); REG_WRITE 738 drivers/gpu/drm/gma500/cdv_intel_lvds.c REG_WRITE(BLC_PWM_CTL2, pwm); REG_WRITE 83 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->stride, fb->pitches[0]); REG_WRITE 107 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->cntr, dspcntr); REG_WRITE 116 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->base, offset + start); REG_WRITE 119 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->base, offset); REG_WRITE 121 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->surf, start); REG_WRITE 156 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(palreg + 4 * i, REG_WRITE 217 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->dpll, temp); REG_WRITE 221 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); REG_WRITE 225 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); REG_WRITE 234 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->cntr, REG_WRITE 237 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->base, REG_READ(map->base)); REG_WRITE 245 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->conf, temp | PIPEACONF_ENABLE); REG_WRITE 250 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->status, temp); REG_WRITE 270 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(VGACNTRL, VGA_DISP_DISABLE); REG_WRITE 281 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->cntr, REG_WRITE 284 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->base, REG_READ(map->base)); REG_WRITE 291 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE); REG_WRITE 303 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->dpll, temp & ~DPLL_VCO_ENABLE); REG_WRITE 316 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(DSPARB, 0x3F3E); REG_WRITE 342 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(control, temp); REG_WRITE 343 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(base, 0); REG_WRITE 419 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(control, temp); REG_WRITE 420 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(base, addr); REG_WRITE 463 drivers/gpu/drm/gma500/gma_display.c REG_WRITE((pipe == 0) ? CURAPOS : CURBPOS, temp); REG_WRITE 464 drivers/gpu/drm/gma500/gma_display.c REG_WRITE((pipe == 0) ? CURABASE : CURBBASE, addr); REG_WRITE 583 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->dpll, REG_WRITE 589 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->fp0, crtc_state->saveFP0); REG_WRITE 592 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->fp1, crtc_state->saveFP1); REG_WRITE 595 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->dpll, crtc_state->saveDPLL); REG_WRITE 599 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->htotal, crtc_state->saveHTOTAL); REG_WRITE 600 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->hblank, crtc_state->saveHBLANK); REG_WRITE 601 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->hsync, crtc_state->saveHSYNC); REG_WRITE 602 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->vtotal, crtc_state->saveVTOTAL); REG_WRITE 603 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->vblank, crtc_state->saveVBLANK); REG_WRITE 604 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->vsync, crtc_state->saveVSYNC); REG_WRITE 605 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->stride, crtc_state->saveDSPSTRIDE); REG_WRITE 607 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->size, crtc_state->saveDSPSIZE); REG_WRITE 608 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->pos, crtc_state->saveDSPPOS); REG_WRITE 610 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->src, crtc_state->savePIPESRC); REG_WRITE 611 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->base, crtc_state->saveDSPBASE); REG_WRITE 612 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->conf, crtc_state->savePIPECONF); REG_WRITE 616 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->cntr, crtc_state->saveDSPCNTR); REG_WRITE 617 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(map->base, crtc_state->saveDSPBASE); REG_WRITE 623 drivers/gpu/drm/gma500/gma_display.c REG_WRITE(palette_reg + (i << 2), crtc_state->savePalette[i]); REG_WRITE 59 drivers/gpu/drm/gma500/intel_i2c.c REG_WRITE(chan->reg, reserved | clock_bits); REG_WRITE 81 drivers/gpu/drm/gma500/intel_i2c.c REG_WRITE(chan->reg, reserved | data_bits); REG_WRITE 375 drivers/gpu/drm/gma500/mdfld_device.c REG_WRITE(mipi_reg, temp); REG_WRITE 384 drivers/gpu/drm/gma500/mdfld_device.c REG_WRITE(device_ready_reg, temp); REG_WRITE 390 drivers/gpu/drm/gma500/mdfld_device.c REG_WRITE(device_ready_reg, temp); REG_WRITE 136 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(pipeconf_reg, BIT(31)); REG_WRITE 143 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(dspcntr_reg, dspcntr); REG_WRITE 159 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(dspbase_reg, REG_READ(dspbase_reg)); REG_WRITE 245 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x00008036); REG_WRITE 247 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x02 << WORD_COUNTS_POS)); REG_WRITE 251 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x005a5af0); REG_WRITE 253 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x03 << WORD_COUNTS_POS)); REG_WRITE 257 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x005a5af1); REG_WRITE 259 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x03 << WORD_COUNTS_POS)); REG_WRITE 263 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x005a5afc); REG_WRITE 265 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x03 << WORD_COUNTS_POS)); REG_WRITE 269 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x770000b7); REG_WRITE 271 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x00000044); REG_WRITE 273 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x05 << WORD_COUNTS_POS)); REG_WRITE 277 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x000a0ab6); REG_WRITE 279 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x03 << WORD_COUNTS_POS)); REG_WRITE 283 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x081010f2); REG_WRITE 285 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x4a070708); REG_WRITE 287 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x000000c5); REG_WRITE 289 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x09 << WORD_COUNTS_POS)); REG_WRITE 293 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x024003f8); REG_WRITE 295 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x01030a04); REG_WRITE 297 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x0e020220); REG_WRITE 299 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x00000004); REG_WRITE 301 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x0d << WORD_COUNTS_POS)); REG_WRITE 305 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x398fc3e2); REG_WRITE 307 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x0000916f); REG_WRITE 309 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x06 << WORD_COUNTS_POS)); REG_WRITE 313 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x000000b0); REG_WRITE 315 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x02 << WORD_COUNTS_POS)); REG_WRITE 319 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x240242f4); REG_WRITE 321 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x78ee2002); REG_WRITE 323 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x2a071050); REG_WRITE 325 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x507fee10); REG_WRITE 327 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x10300710); REG_WRITE 329 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x14 << WORD_COUNTS_POS)); REG_WRITE 333 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x19fe07ba); REG_WRITE 335 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x101c0a31); REG_WRITE 337 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x00000010); REG_WRITE 339 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x09 << WORD_COUNTS_POS)); REG_WRITE 343 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x28ff07bb); REG_WRITE 345 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x24280a31); REG_WRITE 347 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x00000034); REG_WRITE 349 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x09 << WORD_COUNTS_POS)); REG_WRITE 353 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x535d05fb); REG_WRITE 355 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x1b1a2130); REG_WRITE 357 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x221e180e); REG_WRITE 359 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x131d2120); REG_WRITE 361 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x535d0508); REG_WRITE 363 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x1c1a2131); REG_WRITE 365 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x231f160d); REG_WRITE 367 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x111b2220); REG_WRITE 369 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x535c2008); REG_WRITE 371 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x1f1d2433); REG_WRITE 373 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x2c251a10); REG_WRITE 375 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x2c34372d); REG_WRITE 377 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x00000023); REG_WRITE 379 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x31 << WORD_COUNTS_POS)); REG_WRITE 383 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x525c0bfa); REG_WRITE 385 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x1c1c232f); REG_WRITE 387 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x2623190e); REG_WRITE 389 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x18212625); REG_WRITE 391 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x545d0d0e); REG_WRITE 393 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x1e1d2333); REG_WRITE 395 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x26231a10); REG_WRITE 397 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x1a222725); REG_WRITE 399 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x545d280f); REG_WRITE 401 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x21202635); REG_WRITE 403 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x31292013); REG_WRITE 405 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x31393d33); REG_WRITE 407 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x00000029); REG_WRITE 409 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x31 << WORD_COUNTS_POS)); REG_WRITE 413 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_data_reg, 0x000100f7); REG_WRITE 415 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(gen_ctrl_reg, gen_ctrl_val | (0x03 << WORD_COUNTS_POS)); REG_WRITE 481 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_CTRL_REG(pipe), 0x00000018); REG_WRITE 484 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_INTR_EN_REG(pipe), 0xffffffff); REG_WRITE 504 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DSI_FUNC_PRG_REG(pipe), val); REG_WRITE 506 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HS_TX_TIMEOUT_REG(pipe), REG_WRITE 509 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_LP_RX_TIMEOUT_REG(pipe), REG_WRITE 513 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_TURN_AROUND_TIMEOUT_REG(pipe), REG_WRITE 517 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DEVICE_RESET_TIMER_REG(pipe), REG_WRITE 520 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DPI_RESOLUTION_REG(pipe), REG_WRITE 527 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HSYNC_COUNT_REG(pipe), REG_WRITE 529 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HBP_COUNT_REG(pipe), REG_WRITE 531 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HFP_COUNT_REG(pipe), REG_WRITE 533 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HACTIVE_COUNT_REG(pipe), REG_WRITE 535 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_VSYNC_COUNT_REG(pipe), REG_WRITE 537 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_VBP_COUNT_REG(pipe), REG_WRITE 539 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_VFP_COUNT_REG(pipe), REG_WRITE 542 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HIGH_LOW_SWITCH_COUNT_REG(pipe), 0x46); REG_WRITE 545 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_INIT_COUNT_REG(pipe), 0x000007d0); REG_WRITE 549 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_VIDEO_MODE_FORMAT_REG(pipe), val); REG_WRITE 551 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_EOT_DISABLE_REG(pipe), 0x00000000); REG_WRITE 553 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_LP_BYTECLK_REG(pipe), 0x00000004); REG_WRITE 557 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DPHY_PARAM_REG(pipe), 0x2A0c6008); REG_WRITE 559 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DPHY_PARAM_REG(pipe), 0x150c3408); REG_WRITE 561 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_CLK_LANE_SWITCH_TIME_CNT_REG(pipe), (0xa << 16) | 0x14); REG_WRITE 576 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_INTR_STAT_REG(pipe), REG_WRITE 580 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DPI_CONTROL_REG(pipe), DSI_DPI_CTRL_HS_TURN_ON); REG_WRITE 586 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_INTR_STAT_REG(pipe), REG_WRITE 615 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_INTR_STAT_REG(pipe), REG_WRITE 621 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DPI_CONTROL_REG(pipe), DSI_DPI_CTRL_HS_SHUTDOWN); REG_WRITE 657 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_PORT_CONTROL(pipe), REG_WRITE 674 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_PORT_CONTROL(pipe), REG_WRITE 729 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_CTRL_REG(pipe), 0x00000018); REG_WRITE 730 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_INTR_EN_REG(pipe), 0xffffffff); REG_WRITE 731 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HS_TX_TIMEOUT_REG(pipe), 0xffffff); REG_WRITE 732 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_LP_RX_TIMEOUT_REG(pipe), 0xffffff); REG_WRITE 733 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_TURN_AROUND_TIMEOUT_REG(pipe), 0x14); REG_WRITE 734 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DEVICE_RESET_TIMER_REG(pipe), 0xff); REG_WRITE 735 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HIGH_LOW_SWITCH_COUNT_REG(pipe), 0x25); REG_WRITE 736 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_INIT_COUNT_REG(pipe), 0xf0); REG_WRITE 737 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_EOT_DISABLE_REG(pipe), 0x00000000); REG_WRITE 738 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_LP_BYTECLK_REG(pipe), 0x00000004); REG_WRITE 739 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DBI_BW_CTRL_REG(pipe), 0x00000820); REG_WRITE 740 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_CLK_LANE_SWITCH_TIME_CNT_REG(pipe), (0xa << 16) | 0x14); REG_WRITE 754 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DPI_RESOLUTION_REG(pipe), REG_WRITE 756 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HSYNC_COUNT_REG(pipe), REG_WRITE 758 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HBP_COUNT_REG(pipe), REG_WRITE 760 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HFP_COUNT_REG(pipe), REG_WRITE 762 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_HACTIVE_COUNT_REG(pipe), REG_WRITE 764 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_VSYNC_COUNT_REG(pipe), REG_WRITE 766 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_VBP_COUNT_REG(pipe), REG_WRITE 768 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_VFP_COUNT_REG(pipe), REG_WRITE 778 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_PORT_CONTROL(0), 0x00000002); REG_WRITE 779 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_PORT_CONTROL(2), 0x80000000); REG_WRITE 781 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_PORT_CONTROL(0), 0x80010000); REG_WRITE 782 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_PORT_CONTROL(2), 0x00); REG_WRITE 785 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DPHY_PARAM_REG(pipe), 0x150A600F); REG_WRITE 786 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_VIDEO_MODE_FORMAT_REG(pipe), 0x0000000F); REG_WRITE 789 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DSI_FUNC_PRG_REG(pipe), 0x00000200 | lane_count); REG_WRITE 799 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(HTOTAL_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); REG_WRITE 800 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(HBLANK_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); REG_WRITE 801 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(HSYNC_A, REG_WRITE 804 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(VTOTAL_A, ((mode->vtotal - 1) << 16) | (mode->vdisplay - 1)); REG_WRITE 805 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(VBLANK_A, ((mode->vtotal - 1) << 16) | (mode->vdisplay - 1)); REG_WRITE 806 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(VSYNC_A, REG_WRITE 809 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(PIPEASRC, REG_WRITE 861 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MRST_DPLL_A, 0x00); REG_WRITE 862 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MRST_FPA0, 0xC1); REG_WRITE 863 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MRST_DPLL_A, 0x00800000); REG_WRITE 865 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MRST_DPLL_A, 0x80800000); REG_WRITE 871 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_DPHY_PARAM_REG(pipe), 0x2A0c6008); REG_WRITE 877 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(DSPABASE, 0x00); REG_WRITE 878 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(DSPASIZE, REG_WRITE 881 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(DSPACNTR, 0x98000000); REG_WRITE 882 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(DSPASURF, 0x00); REG_WRITE 884 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(VGACNTRL, 0x80000000); REG_WRITE 885 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(DEVICE_READY_REG, 0x00000001); REG_WRITE 887 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_PORT_CONTROL(pipe), 0x80810000); REG_WRITE 890 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(MIPI_PORT_CONTROL(pipe), mipi); REG_WRITE 909 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(pipeconf_reg, pipeconf); REG_WRITE 913 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c REG_WRITE(dspcntr_reg, dspcntr); REG_WRITE 51 drivers/gpu/drm/gma500/mdfld_dsi_output.h REG_WRITE(reg, FLD_MOD(REG_READ(reg), val, start, end)) REG_WRITE 173 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(intr_stat_reg, mask); REG_WRITE 178 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(intr_stat_reg, mask); REG_WRITE 238 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(ctrl_reg, val); REG_WRITE 274 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(data_reg, b4 << 24 | b3 << 16 | b2 << 8 | b1); REG_WRITE 296 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(data_reg, b3 << 16 | b2 << 8 | b1); REG_WRITE 302 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(ctrl_reg, val); REG_WRITE 545 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(sender->mipi_intr_stat_reg, BIT(29)); REG_WRITE 564 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(sender->mipi_intr_stat_reg, BIT(29)); REG_WRITE 660 drivers/gpu/drm/gma500/mdfld_dsi_pkg_sender.c REG_WRITE(MIPI_PORT_CONTROL(pipe), mipi_val); REG_WRITE 134 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(dspcntr_reg, dspcntr); REG_WRITE 192 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->stride, fb->pitches[0]); REG_WRITE 211 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, dspcntr); REG_WRITE 215 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->linoff, offset); REG_WRITE 217 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->surf, start); REG_WRITE 245 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, REG_WRITE 248 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->base, REG_READ(map->base)); REG_WRITE 259 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->conf, temp); REG_WRITE 272 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, temp); REG_WRITE 280 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, temp | MDFLD_PWR_GATE_EN); REG_WRITE 329 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, temp); REG_WRITE 334 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, temp); REG_WRITE 339 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, temp | DPLL_VCO_ENABLE); REG_WRITE 357 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, REG_WRITE 360 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->base, REG_READ(map->base)); REG_WRITE 366 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->conf, pipeconf); REG_WRITE 375 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->status, REG_READ(map->status)); REG_WRITE 383 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, REG_WRITE 385 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->base, REG_READ(map->base)); REG_WRITE 387 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(0xb048, 1); REG_WRITE 391 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->conf, temp); REG_WRITE 393 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(MIPI_DEVICE_READY_REG(pipe), 0); REG_WRITE 395 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(0xb004, REG_READ(0xb004)); REG_WRITE 397 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(MIPI_DEVICE_READY_REG(pipe), 1); REG_WRITE 399 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, REG_WRITE 401 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->base, REG_READ(map->base)); REG_WRITE 403 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(0xb048, 2); REG_WRITE 407 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->conf, temp); REG_WRITE 428 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(VGACNTRL, VGA_DISP_DISABLE); REG_WRITE 433 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, REG_WRITE 436 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->base, REG_READ(map->base)); REG_WRITE 445 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->conf, temp); REG_WRITE 458 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, temp); REG_WRITE 753 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(VGACNTRL, VGA_DISP_DISABLE); REG_WRITE 757 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(PFIT_CONTROL, 0); REG_WRITE 774 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->size, ((min(mode->crtc_vdisplay, adjusted_mode->crtc_vdisplay) - 1) << 16) REG_WRITE 777 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->src, ((mode->crtc_hdisplay - 1) << 16) REG_WRITE 780 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->size, REG_WRITE 783 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->src, REG_WRITE 788 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->pos, 0); REG_WRITE 806 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->htotal, (mode->crtc_hdisplay - 1) | REG_WRITE 808 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->vtotal, (mode->crtc_vdisplay - 1) | REG_WRITE 810 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - REG_WRITE 813 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - REG_WRITE 816 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->vblank, (adjusted_mode->crtc_vblank_start - REG_WRITE 819 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->vsync, (adjusted_mode->crtc_vsync_start - REG_WRITE 823 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) | REG_WRITE 825 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) | REG_WRITE 827 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | REG_WRITE 829 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | REG_WRITE 831 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->vblank, (adjusted_mode->crtc_vblank_start - 1) | REG_WRITE 833 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->vsync, (adjusted_mode->crtc_vsync_start - 1) | REG_WRITE 919 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, dpll); REG_WRITE 927 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->fp0, 0); REG_WRITE 929 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, dpll); REG_WRITE 938 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, dpll); REG_WRITE 979 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->fp0, fp); REG_WRITE 980 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, dpll); REG_WRITE 985 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->dpll, dpll); REG_WRITE 1000 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->conf, dev_priv->pipeconf[pipe]); REG_WRITE 1004 drivers/gpu/drm/gma500/mdfld_intel_display.c REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]); REG_WRITE 328 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(DSPARB, 0x3f80); REG_WRITE 329 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(DSPFW1, 0x3f8f0404); REG_WRITE 330 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(DSPFW2, 0x04040f04); REG_WRITE 331 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(DSPFW3, 0x0); REG_WRITE 332 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(DSPFW4, 0x04040404); REG_WRITE 333 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(DSPFW5, 0x04040404); REG_WRITE 334 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(DSPFW6, 0x78); REG_WRITE 335 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(DSPCHICKENBIT, REG_READ(DSPCHICKENBIT) | 0xc040); REG_WRITE 419 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(PFIT_CONTROL, 0); REG_WRITE 614 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(map->stride, fb->pitches[0]); REG_WRITE 638 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(map->cntr, dspcntr); REG_WRITE 640 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(map->base, offset); REG_WRITE 642 drivers/gpu/drm/gma500/oaktrail_crtc.c REG_WRITE(map->surf, start); REG_WRITE 84 drivers/gpu/drm/gma500/oaktrail_device.c REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2))); REG_WRITE 85 drivers/gpu/drm/gma500/oaktrail_device.c REG_WRITE(BLC_PWM_CTL, (max_pwm_blc << 16) | blc_pwm_ctl); REG_WRITE 125 drivers/gpu/drm/gma500/oaktrail_device.c REG_WRITE(BLC_PWM_CTL2, (0x80000000 | REG_READ(BLC_PWM_CTL2))); REG_WRITE 126 drivers/gpu/drm/gma500/oaktrail_device.c REG_WRITE(BLC_PWM_CTL, value | (value << 16)); REG_WRITE 290 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(VGACNTRL, VGA_DISP_DISABLE); REG_WRITE 295 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_CTRL, dpll | (DPLL_PWRDN | DPLL_RESET)); REG_WRITE 296 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_DIV_CTRL, 0x00000000); REG_WRITE 297 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_STATUS, 0x1); REG_WRITE 312 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_CTRL, 0x00000008); REG_WRITE 313 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_DIV_CTRL, ((clock.nf << 6) | clock.nr)); REG_WRITE 314 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_ADJUST, ((clock.nf >> 14) - 1)); REG_WRITE 315 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_CTRL, (dpll | (clock.np << DPLL_PDIV_SHIFT) | DPLL_ENSTAT | DPLL_DITHEN)); REG_WRITE 316 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_UPDATE, 0x80000000); REG_WRITE 317 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_CLK_ENABLE, 0x80050102); REG_WRITE 328 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(htot_reg, temp); REG_WRITE 329 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(hblank_reg, (adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end - 1) << 16)); REG_WRITE 330 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(hsync_reg, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1) << 16)); REG_WRITE 331 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(vtot_reg, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << 16)); REG_WRITE 332 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(vblank_reg, (adjusted_mode->crtc_vblank_start - 1) | ((adjusted_mode->crtc_vblank_end - 1) << 16)); REG_WRITE 333 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(vsync_reg, (adjusted_mode->crtc_vsync_start - 1) | ((adjusted_mode->crtc_vsync_end - 1) << 16)); REG_WRITE 334 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(pipesrc_reg, ((mode->crtc_hdisplay - 1) << 16) | (mode->crtc_vdisplay - 1)); REG_WRITE 336 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_HTOTAL_B, (adjusted_mode->crtc_hdisplay - 1) | ((adjusted_mode->crtc_htotal - 1) << 16)); REG_WRITE 337 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_HBLANK_B, (adjusted_mode->crtc_hblank_start - 1) | ((adjusted_mode->crtc_hblank_end - 1) << 16)); REG_WRITE 338 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_HSYNC_B, (adjusted_mode->crtc_hsync_start - 1) | ((adjusted_mode->crtc_hsync_end - 1) << 16)); REG_WRITE 339 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_VTOTAL_B, (adjusted_mode->crtc_vdisplay - 1) | ((adjusted_mode->crtc_vtotal - 1) << 16)); REG_WRITE 340 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_VBLANK_B, (adjusted_mode->crtc_vblank_start - 1) | ((adjusted_mode->crtc_vblank_end - 1) << 16)); REG_WRITE 341 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_VSYNC_B, (adjusted_mode->crtc_vsync_start - 1) | ((adjusted_mode->crtc_vsync_end - 1) << 16)); REG_WRITE 342 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_PIPEBSRC, ((mode->crtc_hdisplay - 1) << 16) | (mode->crtc_vdisplay - 1)); REG_WRITE 347 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(dspsize_reg, ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); REG_WRITE 348 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(dsppos_reg, 0); REG_WRITE 366 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(pipeconf_reg, pipeconf); REG_WRITE 369 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_PIPEBCONF, pipeconf); REG_WRITE 373 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(dspcntr_reg, dspcntr); REG_WRITE 390 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(VGACNTRL, 0x80000000); REG_WRITE 395 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DSPBCNTR, temp & ~DISPLAY_PLANE_ENABLE); REG_WRITE 398 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DSPBSURF, REG_READ(DSPBSURF)); REG_WRITE 405 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PIPEBCONF, temp & ~PIPEACONF_ENABLE); REG_WRITE 412 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_PIPEBCONF, temp & ~PIPEACONF_ENABLE); REG_WRITE 422 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_CTRL, temp | (DPLL_PWRDN | DPLL_RESET)); REG_WRITE 423 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_STATUS, 0x1); REG_WRITE 436 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_CTRL, temp & ~(DPLL_PWRDN | DPLL_RESET)); REG_WRITE 438 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DPLL_CLK_ENABLE, temp | DPLL_EN_DISP | DPLL_SEL_HDMI | DPLL_EN_HDMI); REG_WRITE 447 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PIPEBCONF, temp | PIPEACONF_ENABLE); REG_WRITE 454 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(PCH_PIPEBCONF, temp | PIPEACONF_ENABLE); REG_WRITE 463 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DSPBCNTR, temp | DISPLAY_PLANE_ENABLE); REG_WRITE 465 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DSPBSURF, REG_READ(DSPBSURF)); REG_WRITE 473 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(DSPARB, 0x00003fbf); REG_WRITE 476 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(0x70034, 0x3f880a0a); REG_WRITE 479 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(0x70038, 0x0b060808); REG_WRITE 482 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(0x70050, 0x08030404); REG_WRITE 485 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(0x70054, 0x04040404); REG_WRITE 488 drivers/gpu/drm/gma500/oaktrail_hdmi.c REG_WRITE(0x70400, 0x4000); REG_WRITE 44 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | REG_WRITE 55 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & REG_WRITE 110 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(LVDS, lvds_port); REG_WRITE 129 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, 0); REG_WRITE 135 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); REG_WRITE 139 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | REG_WRITE 142 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | REG_WRITE 145 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); REG_WRITE 147 drivers/gpu/drm/gma500/oaktrail_lvds.c REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); REG_WRITE 86 drivers/gpu/drm/gma500/psb_device.c REG_WRITE(BLC_PWM_CTL, REG_WRITE 865 drivers/gpu/drm/gma500/psb_drv.h REG_WRITE(reg, val); REG_WRITE 208 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(PFIT_CONTROL, 0); REG_WRITE 213 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->fp0, fp); REG_WRITE 214 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->dpll, dpll & ~DPLL_VCO_ENABLE); REG_WRITE 244 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(LVDS, lvds); REG_WRITE 248 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->fp0, fp); REG_WRITE 249 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->dpll, dpll); REG_WRITE 255 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->dpll, dpll); REG_WRITE 261 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) | REG_WRITE 263 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) | REG_WRITE 265 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | REG_WRITE 267 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) | REG_WRITE 269 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->vblank, (adjusted_mode->crtc_vblank_start - 1) | REG_WRITE 271 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->vsync, (adjusted_mode->crtc_vsync_start - 1) | REG_WRITE 276 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->size, REG_WRITE 278 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->pos, 0); REG_WRITE 279 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->src, REG_WRITE 281 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->conf, pipeconf); REG_WRITE 286 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(map->cntr, dspcntr); REG_WRITE 473 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(control[gma_crtc->pipe], 0); REG_WRITE 474 drivers/gpu/drm/gma500/psb_intel_display.c REG_WRITE(base[gma_crtc->pipe], 0); REG_WRITE 146 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(BLC_PWM_CTL, REG_WRITE 190 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(BLC_PWM_CTL, REG_WRITE 219 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | REG_WRITE 230 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & REG_WRITE 308 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL); REG_WRITE 309 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL); REG_WRITE 310 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS); REG_WRITE 311 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON); REG_WRITE 312 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF); REG_WRITE 314 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE); REG_WRITE 315 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL); REG_WRITE 316 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(LVDS, lvds_priv->saveLVDS); REG_WRITE 319 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | REG_WRITE 325 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & REG_WRITE 485 drivers/gpu/drm/gma500/psb_intel_lvds.c REG_WRITE(PFIT_CONTROL, pfit_control); REG_WRITE 1828 drivers/gpu/drm/gma500/psb_intel_sdvo.c REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO); REG_WRITE 286 drivers/gpu/drm/gma500/psb_irq.c REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT)); REG_WRITE 28 drivers/gpu/drm/gma500/psb_lid.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | POWER_TARGET_ON); REG_WRITE 44 drivers/gpu/drm/gma500/psb_lid.c REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & ~POWER_TARGET_ON); REG_WRITE 34 drivers/media/usb/dvb-usb-v2/ce6230.c case REG_WRITE: REG_WRITE 135 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_PHY_ERR_1, 0); REG_WRITE 136 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_PHY_ERR_2, 0); REG_WRITE 137 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); REG_WRITE 138 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); REG_WRITE 451 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_FILT_OFDM, 0); REG_WRITE 452 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_FILT_CCK, 0); REG_WRITE 453 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_MIBC, REG_WRITE 456 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); REG_WRITE 457 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); REG_WRITE 469 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC); REG_WRITE 471 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_MIBC, AR_MIBC_CMC); REG_WRITE 472 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_FILT_OFDM, 0); REG_WRITE 473 drivers/net/wireless/ath/ath9k/ani.c REG_WRITE(ah, AR_FILT_CCK, 0); REG_WRITE 69 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, INI_RA(array, r, 0), data[r]); REG_WRITE 214 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, REG_WRITE 217 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, REG_WRITE 246 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY(0x37), reg32); REG_WRITE 290 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, pilot_mask_reg[i], pilot_mask); REG_WRITE 291 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, chan_mask_reg[i], chan_mask); REG_WRITE 323 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask); REG_WRITE 324 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask); REG_WRITE 334 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask); REG_WRITE 335 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask); REG_WRITE 345 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask); REG_WRITE 346 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask); REG_WRITE 356 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask); REG_WRITE 357 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask); REG_WRITE 367 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask); REG_WRITE 368 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask); REG_WRITE 378 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask); REG_WRITE 379 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask); REG_WRITE 389 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask); REG_WRITE 390 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask); REG_WRITE 400 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask); REG_WRITE 401 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask); REG_WRITE 448 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new); REG_WRITE 455 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_SPUR_REG, new); REG_WRITE 466 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_TIMING11, new); REG_WRITE 565 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); REG_WRITE 585 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7); REG_WRITE 586 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7); REG_WRITE 594 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask); REG_WRITE 595 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask); REG_WRITE 602 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_SELFGEN_MASK, tx_chainmask); REG_WRITE 611 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_ANALOG_SWAP, REG_WRITE 646 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PCU_MISC_MODE2, val); REG_WRITE 655 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, 0x9800 + (651 << 2), 0x11); REG_WRITE 664 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val); REG_WRITE 689 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_TURBO, phymode); REG_WRITE 695 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S); REG_WRITE 696 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S); REG_WRITE 721 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY(0), 0x00000007); REG_WRITE 724 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO); REG_WRITE 729 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC); REG_WRITE 740 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, reg, val); REG_WRITE 772 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, reg, val); REG_WRITE 825 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_MODE, rfMode); REG_WRITE 830 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); REG_WRITE 869 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN); REG_WRITE 880 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0); REG_WRITE 888 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask); REG_WRITE 889 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask); REG_WRITE 1236 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_RADAR_0, radar_0); REG_WRITE 1237 drivers/net/wireless/ath/ath9k/ar5008_phy.c REG_WRITE(ah, AR_PHY_RADAR_1, radar_1); REG_WRITE 60 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ); REG_WRITE 65 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN); REG_WRITE 69 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER); REG_WRITE 302 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); REG_WRITE 309 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), REG_WRITE 357 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); REG_WRITE 363 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), REG_WRITE 485 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR9285_AN_TOP2, 0xca0358a0); REG_WRITE 493 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR9285_AN_RF2G6, regVal); REG_WRITE 500 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR9285_AN_RF2G6, regVal); REG_WRITE 527 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, regList[i][0], regList[i][1]); REG_WRITE 560 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, 0x7834, regVal); REG_WRITE 563 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, 0x9808, regVal); REG_WRITE 580 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR9285_AN_TOP2, 0xca0358a0); REG_WRITE 588 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, 0x7834, regVal); REG_WRITE 594 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, 0x7834, regVal); REG_WRITE 625 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, 0x7834, regVal); REG_WRITE 628 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, 0x9808, regVal); REG_WRITE 631 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, regList[i][0], regList[i][1]); REG_WRITE 799 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR9285_RF2G5, REG_WRITE 803 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR9285_RF2G5, REG_WRITE 808 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR9285_RF2G5, reg_rf2g5_org); REG_WRITE 833 drivers/net/wireless/ath/ath9k/ar9002_calib.c REG_WRITE(ah, AR_PHY_AGC_CONTROL, REG_WRITE 217 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, INI_RA(&ah->iniPcieSerdes, i, 0), REG_WRITE 223 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00); REG_WRITE 224 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924); REG_WRITE 227 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x28000039); REG_WRITE 228 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x53160824); REG_WRITE 229 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0xe5980579); REG_WRITE 235 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x001defff); REG_WRITE 237 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40); REG_WRITE 238 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554); REG_WRITE 239 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x000e3007); REG_WRITE 242 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000); REG_WRITE 289 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_WA, val); REG_WRITE 317 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_WA, val); REG_WRITE 331 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PHY(0x36), 0x00007058); REG_WRITE 333 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PHY(0x20), 0x00010000); REG_WRITE 347 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, AR_PHY(0), 0x00000007); REG_WRITE 448 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, reg, val|val_orig); REG_WRITE 450 drivers/net/wireless/ath/ath9k/ar9002_hw.c REG_WRITE(ah, reg, val); REG_WRITE 24 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_CR, AR_CR_RXE); REG_WRITE 82 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_ISR_S2, isr2); REG_WRITE 113 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_ISR_S0, s0_s); REG_WRITE 115 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_ISR_S1, s1_s); REG_WRITE 160 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_ISR_S5, s5_s); REG_WRITE 166 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_ISR, isr); REG_WRITE 195 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_RC, AR_RC_HOSTIF); REG_WRITE 196 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_RC, 0); REG_WRITE 204 drivers/net/wireless/ath/ath9k/ar9002_mac.c REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause); REG_WRITE 101 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, REG_WRITE 104 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, REG_WRITE 153 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32); REG_WRITE 233 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), newVal); REG_WRITE 240 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_SPUR_REG, newVal); REG_WRITE 270 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_TIMING11, newVal); REG_WRITE 273 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_SFCORR_EXT, newVal); REG_WRITE 411 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval); REG_WRITE 430 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2); REG_WRITE 432 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_SWITCH_COM, ATH_BT_COEX_ANT_DIV_SWITCH_COM); REG_WRITE 445 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2); REG_WRITE 451 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_SWITCH_COM, 0); REG_WRITE 467 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval); REG_WRITE 472 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_PHY_CCK_DETECT, regval); REG_WRITE 560 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_CR, AR_CR_RXD); REG_WRITE 561 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_DLCL_IFS(qnum), 0); REG_WRITE 562 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_D_GBL_IFS_SIFS, 20); REG_WRITE 563 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_D_GBL_IFS_EIFS, 20); REG_WRITE 564 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_D_FPCTL, 0x10|qnum); REG_WRITE 565 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_TIME_OUT, 0x00000400); REG_WRITE 566 drivers/net/wireless/ath/ath9k/ar9002_phy.c REG_WRITE(ah, AR_DRETRY_LIMIT(qnum), 0xffffffff); REG_WRITE 111 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_BT_COEX_4, 0x2c200a00); REG_WRITE 112 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_BT_COEX_5, 0x5c4e4438); REG_WRITE 155 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, (AR_PHY_AIC_SRAM_ADDR_B0 + 0x3000), REG_WRITE 160 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, (AR_PHY_AIC_SRAM_DATA_B0 + 0x3000), REG_WRITE 171 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, (AR_PHY_AIC_SRAM_ADDR_B0 + 0x3000), REG_WRITE 176 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, (AR_PHY_AIC_SRAM_DATA_B0 + 0x3000), 0); REG_WRITE 180 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_CTRL_0_B0, REG_WRITE 190 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_CTRL_0_B1, REG_WRITE 197 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_CTRL_1_B0, REG_WRITE 206 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_CTRL_1_B1, REG_WRITE 210 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_CTRL_2_B0, REG_WRITE 220 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_CTRL_3_B0, REG_WRITE 230 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_CTRL_4_B0, REG_WRITE 237 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_CTRL_4_B1, REG_WRITE 247 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, ATH_AIC_BT_JUPITER_CTRL, REG_WRITE 442 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, ATH_AIC_BT_JUPITER_CTRL, REG_WRITE 486 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_SRAM_ADDR_B1, REG_WRITE 551 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_SRAM_ADDR_B1, ATH_AIC_SRAM_AUTO_INCREMENT); REG_WRITE 554 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_AIC_SRAM_DATA_B1, aic->aic_sram[i]); REG_WRITE 558 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, 0xa6b0, 0x80); REG_WRITE 559 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, 0xa6b4, 0x5b2df0); REG_WRITE 560 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, 0xa6b8, 0x10762cc8); REG_WRITE 561 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, 0xa6bc, 0x1219a4b); REG_WRITE 562 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, 0xa6c0, 0x1e01); REG_WRITE 563 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, 0xb6b4, 0xf0); REG_WRITE 564 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, 0xb6c0, 0x1e01); REG_WRITE 565 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, 0xb6b0, 0x81); REG_WRITE 566 drivers/net/wireless/ath/ath9k/ar9003_aic.c REG_WRITE(ah, AR_PHY_65NM_CH1_RXTX4, 0x40000000); REG_WRITE 53 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ); REG_WRITE 353 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_AGC_CONTROL, REG_WRITE 390 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_AGC_CONTROL, REG_WRITE 407 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, REG_WRITE 409 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, REG_WRITE 411 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, REG_WRITE 429 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, REG_WRITE 431 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, REG_WRITE 433 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, REG_WRITE 451 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH0_BB3, REG_WRITE 453 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH1_BB3, REG_WRITE 455 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH2_BB3, REG_WRITE 483 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH0_BB1, val); REG_WRITE 504 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH1_BB1, val); REG_WRITE 525 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_65NM_CH2_BB1, val); REG_WRITE 1361 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]), REG_WRITE 1436 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl); REG_WRITE 1484 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); REG_WRITE 1486 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_RX_DELAY, AR_PHY_RX_DELAY_DELAY); REG_WRITE 1487 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); REG_WRITE 1492 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_AGC_CONTROL, REG_WRITE 1505 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_RX_DELAY, rx_delay); REG_WRITE 1514 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_AGC_CONTROL, agc_ctrl); REG_WRITE 1565 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_AGC_CONTROL, REG_WRITE 1629 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); REG_WRITE 1631 drivers/net/wireless/ath/ath9k/ar9003_calib.c REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); REG_WRITE 3762 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); REG_WRITE 3773 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_CCK_DETECT, regval); REG_WRITE 3790 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); REG_WRITE 3814 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_65NM_CH0_BIAS1, reg); REG_WRITE 3827 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_65NM_CH0_BIAS2, reg); REG_WRITE 3834 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_65NM_CH0_BIAS4, reg); REG_WRITE 3945 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, pmu_reg, pmu_set); REG_WRITE 3963 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_PMU2, reg_pmu_set); REG_WRITE 3986 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_PMU1, reg_pmu_set); REG_WRITE 3992 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_PMU2, reg_pmu_set); REG_WRITE 3998 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_PMU2, reg_pmu_set); REG_WRITE 4004 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_PMU1, reg_val); REG_WRITE 4007 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_PMU2, 0x10200000); REG_WRITE 4011 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_RTC_REG_CONTROL1, REG_WRITE 4014 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_RTC_REG_CONTROL0, reg_val); REG_WRITE 4016 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_RTC_REG_CONTROL1, REG_WRITE 4041 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_RTC_SLEEP_CLK, reg_val); REG_WRITE 4470 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_TPC, val); REG_WRITE 4478 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_TX_FORCED_GAIN, 0); REG_WRITE 4483 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(0), REG_WRITE 4490 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(1), REG_WRITE 4499 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(2), REG_WRITE 4506 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(3), REG_WRITE 4516 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(8), REG_WRITE 4526 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(4), REG_WRITE 4534 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(5), REG_WRITE 4542 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(9), REG_WRITE 4552 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(10), REG_WRITE 4564 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(6), REG_WRITE 4572 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(7), REG_WRITE 4580 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE(11), REG_WRITE 5553 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_PWRTX_MAX, REG_WRITE 5558 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_SUB, REG_WRITE 5561 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_POWER_TX_SUB, REG_WRITE 5565 drivers/net/wireless/ath/ath9k/ar9003_eeprom.c REG_WRITE(ah, AR_PHY_PWRTX_MAX, 0); REG_WRITE 1028 drivers/net/wireless/ath/ath9k/ar9003_hw.c REG_WRITE(ah, 0x570c, val); REG_WRITE 1036 drivers/net/wireless/ath/ath9k/ar9003_hw.c REG_WRITE(ah, AR_WA, ah->WARegVal); REG_WRITE 1047 drivers/net/wireless/ath/ath9k/ar9003_hw.c REG_WRITE(ah, REG_WRITE 23 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(hw, AR_CR, 0); REG_WRITE 234 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_ISR_S2, isr2); REG_WRITE 269 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_ISR_S0, s0); REG_WRITE 271 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_ISR_S1, s1); REG_WRITE 296 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_ISR_S5, s5); REG_WRITE 305 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_ISR, isr); REG_WRITE 338 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_RC, AR_RC_HOSTIF); REG_WRITE 339 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_RC, 0); REG_WRITE 347 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause); REG_WRITE 466 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_DATABUF_SIZE, buf_size & AR_DATABUF_SIZE_MASK); REG_WRITE 474 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_HP_RXDP, rxdp); REG_WRITE 476 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_LP_RXDP, rxdp); REG_WRITE 601 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_Q_STATUS_RING_START, ah->ts_paddr_start); REG_WRITE 602 drivers/net/wireless/ath/ath9k/ar9003_mac.c REG_WRITE(ah, AR_Q_STATUS_RING_END, ah->ts_paddr_end); REG_WRITE 48 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, address, bit_position); REG_WRITE 58 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, REG_WRITE 61 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, AR_MCI_INTERRUPT_RX_MSG); REG_WRITE 234 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_EN, 0); REG_WRITE 235 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, REG_WRITE 237 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, REG_WRITE 272 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_BT_PRI0, 0xFFFFFFFF); REG_WRITE 273 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_BT_PRI1, 0xFFFFFFFF); REG_WRITE 274 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_BT_PRI2, 0xFFFFFFFF); REG_WRITE 275 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_BT_PRI3, 0xFFFFFFFF); REG_WRITE 276 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_BT_PRI, 0X000000FF); REG_WRITE 284 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, REG_WRITE 286 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, AR_MCI_INTERRUPT_BT_PRI); REG_WRITE 312 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, REG_WRITE 314 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, REG_WRITE 318 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_EN, saved_mci_int_en); REG_WRITE 336 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_EN, 0); REG_WRITE 337 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0); REG_WRITE 342 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_EN, AR_MCI_INTERRUPT_DEFAULT); REG_WRITE 343 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, REG_WRITE 389 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, rx_msg_intr); REG_WRITE 390 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, raw_intr); REG_WRITE 469 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_OBS, 0x4b); REG_WRITE 753 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, REG_WRITE 791 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_MSG_ATTRIBUTES_TABLE, 0xffff0000); REG_WRITE 792 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS0, 0xffffffff); REG_WRITE 793 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS1, 0xffffffff); REG_WRITE 794 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS2, 0xffffffff); REG_WRITE 795 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_WL_WEIGHTS3, 0xffffffff); REG_WRITE 880 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_CTRL, regval); REG_WRITE 899 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_CTRL, regval); REG_WRITE 916 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_CTRL, regval); REG_WRITE 935 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_GPM_0, mci->gpm_addr); REG_WRITE 936 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_GPM_1, mci->gpm_len); REG_WRITE 937 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_SCHD_TABLE_0, mci->sched_addr); REG_WRITE 979 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_MAX_TXPWR(i), 0x7f7f7f7f); REG_WRITE 989 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_COMMAND2, regval); REG_WRITE 994 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_COMMAND2, regval); REG_WRITE 1005 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_COMMAND2, regval); REG_WRITE 1008 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_COMMAND2, regval); REG_WRITE 1013 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_MSG_ATTRIBUTES_TABLE, REG_WRITE 1048 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_CTRL, 0); REG_WRITE 1151 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_SELFGEN_MASK, 0x02); REG_WRITE 1195 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_EN, 0); REG_WRITE 1199 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RAW, REG_WRITE 1205 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, (AR_MCI_TX_PAYLOAD0 + i * 4), REG_WRITE 1209 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_COMMAND0, REG_WRITE 1225 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_EN, saved_mci_int_en); REG_WRITE 1285 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_CTRL, 0x00); REG_WRITE 1435 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_CTRL2, (btcoex_ctrl2 | BIT(23))); REG_WRITE 1443 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_DIAG_SW, (diag_sw | BIT(27) | BIT(19) | BIT(18))); REG_WRITE 1447 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_BTCOEX_CTRL2, btcoex_ctrl2); REG_WRITE 1448 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_DIAG_SW, diag_sw); REG_WRITE 1490 drivers/net/wireless/ath/ath9k/ar9003_mci.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_RAW, REG_WRITE 769 drivers/net/wireless/ath/ath9k/ar9003_paprd.c REG_WRITE(ah, reg, paprd_table_val[i]); REG_WRITE 206 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32); REG_WRITE 215 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32); REG_WRITE 221 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32); REG_WRITE 648 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_GEN_CTRL, phymode); REG_WRITE 654 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S); REG_WRITE 656 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S); REG_WRITE 672 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); REG_WRITE 682 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx); REG_WRITE 683 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx); REG_WRITE 688 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_SELFGEN_MASK, tx); REG_WRITE 716 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PCU_MISC_MODE2, val); REG_WRITE 719 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_GLB_SWREG_DISCONT_MODE, REG_WRITE 738 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1); REG_WRITE 739 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7); REG_WRITE 740 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_SLP32_INC, 0x0001e7ae); REG_WRITE 742 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x261 << 1); REG_WRITE 743 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_SLP32_MODE, 0x0010f400); REG_WRITE 744 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_SLP32_INC, 0x0001e800); REG_WRITE 772 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, reg, val); REG_WRITE 999 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_MODE, rfMode); REG_WRITE 1004 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); REG_WRITE 1056 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN); REG_WRITE 1071 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0); REG_WRITE 1480 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_RADAR_0, radar_0); REG_WRITE 1481 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_RADAR_1, radar_1); REG_WRITE 1561 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); REG_WRITE 1595 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); REG_WRITE 1607 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); REG_WRITE 1618 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_CCK_DETECT, regval); REG_WRITE 1634 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); REG_WRITE 1669 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); REG_WRITE 1809 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_CR, AR_CR_RXD); REG_WRITE 1810 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_DLCL_IFS(qnum), 0); REG_WRITE 1811 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_D_GBL_IFS_SIFS, 20); /* 50 OK */ REG_WRITE 1812 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_D_GBL_IFS_EIFS, 20); REG_WRITE 1813 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_TIME_OUT, 0x00000400); REG_WRITE 1814 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_DRETRY_LIMIT(qnum), 0xffffffff); REG_WRITE 2019 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_RADAR_0, val); REG_WRITE 2024 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_RADAR_0, val); REG_WRITE 2055 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_2, REG_WRITE 2061 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_1, REG_WRITE 2072 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_2, REG_WRITE 2097 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_WATCHDOG_CTL_1, REG_WRITE 2118 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_WATCHDOG_STATUS, REG_WRITE 2177 drivers/net/wireless/ath/ath9k/ar9003_phy.c REG_WRITE(ah, AR_PHY_RESTART, val); REG_WRITE 40 drivers/net/wireless/ath/ath9k/ar9003_rtt.c REG_WRITE(ah, AR_PHY_RTT_CTRL, 1); REG_WRITE 45 drivers/net/wireless/ath/ath9k/ar9003_rtt.c REG_WRITE(ah, AR_PHY_RTT_CTRL, 0); REG_WRITE 78 drivers/net/wireless/ath/ath9k/ar9003_rtt.c REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_1_B(chain), val); REG_WRITE 83 drivers/net/wireless/ath/ath9k/ar9003_rtt.c REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); REG_WRITE 87 drivers/net/wireless/ath/ath9k/ar9003_rtt.c REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); REG_WRITE 96 drivers/net/wireless/ath/ath9k/ar9003_rtt.c REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); REG_WRITE 150 drivers/net/wireless/ath/ath9k/ar9003_rtt.c REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); REG_WRITE 154 drivers/net/wireless/ath/ath9k/ar9003_rtt.c REG_WRITE(ah, AR_PHY_RTT_TABLE_SW_INTF_B(chain), val); REG_WRITE 44 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_CR, AR_CR_RXD); REG_WRITE 62 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_RTC_KEEP_AWAKE, 0x2); REG_WRITE 64 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT); REG_WRITE 92 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]); REG_WRITE 111 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + (12 * 4)), 0); REG_WRITE 118 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, (wow_ka_data_word0 + i*4), data_word[i]); REG_WRITE 139 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, (AR_WOW_TB_PATTERN(pattern_count) + i), REG_WRITE 146 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, (AR_WOW_TB_MASK(pattern_count) + i), mask_val); REG_WRITE 235 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_PATTERN, REG_WRITE 237 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_MAC_PCU_WOW4, REG_WRITE 243 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); REG_WRITE 286 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WA, wa_reg); REG_WRITE 339 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_BCN_TIMO, AR_WOW_BEACON_TIMO); REG_WRITE 341 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_BCN_TIMO, AR_WOW_BEACON_TIMO_MAX); REG_WRITE 347 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, AR_WOW_KEEP_ALIVE_NEVER); REG_WRITE 349 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, KAL_TIMEOUT * 32); REG_WRITE 354 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_KEEP_ALIVE_DELAY, KAL_DELAY * 1000); REG_WRITE 376 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_KEEP_ALIVE, keep_alive); REG_WRITE 405 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_PATTERN, magic_pattern); REG_WRITE 411 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_WOW_PATTERN_MATCH_LT_256B, REG_WRITE 433 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_PCIE_PM_CTRL, host_pm_ctrl); REG_WRITE 446 drivers/net/wireless/ath/ath9k/ar9003_wow.c REG_WRITE(ah, AR_RTC_KEEP_AWAKE, 0x2); REG_WRITE 333 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_MODE, btcoex->bt_coex_mode); REG_WRITE 334 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex->bt_coex_mode2); REG_WRITE 337 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_MODE3, btcoex->bt_coex_mode3); REG_WRITE 340 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, btcoex->wlan_weight[0]); REG_WRITE 341 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, btcoex->wlan_weight[1]); REG_WRITE 343 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), REG_WRITE 346 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex->bt_coex_weights); REG_WRITE 351 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, 0x50040, val); REG_WRITE 368 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i), REG_WRITE 383 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_MCI_COEX_WL_WEIGHTS(i), REG_WRITE 435 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE); REG_WRITE 436 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_MODE2, 0); REG_WRITE 439 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS0, 0); REG_WRITE 440 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_WL_WEIGHTS1, 0); REG_WRITE 442 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_BT_WEIGHTS(i), 0); REG_WRITE 444 drivers/net/wireless/ath/ath9k/btcoex.c REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0); REG_WRITE 22 drivers/net/wireless/ath/ath9k/eeprom.c REG_WRITE(ah, reg, val); REG_WRITE 346 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset, REG_WRITE 361 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, regOffset, reg32); REG_WRITE 620 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, REG_WRITE 625 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE2, REG_WRITE 632 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, REG_WRITE 637 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, REG_WRITE 644 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, REG_WRITE 649 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE6, REG_WRITE 657 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, REG_WRITE 666 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, REG_WRITE 675 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, REG_WRITE 689 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, REG_WRITE 693 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER); REG_WRITE 772 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon)); REG_WRITE 797 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); REG_WRITE 804 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_CCK_DETECT, regVal); REG_WRITE 822 drivers/net/wireless/ath/ath9k/eeprom_4k.c REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regVal); REG_WRITE 323 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, 0xa270, tmpVal); REG_WRITE 330 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, 0xb270, tmpVal); REG_WRITE 339 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, 0xa398, tmpVal); REG_WRITE 349 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, 0xb398, tmpVal); REG_WRITE 454 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, REG_WRITE 482 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, regOffset, reg32); REG_WRITE 750 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, REG_WRITE 756 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE2, REG_WRITE 764 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, REG_WRITE 769 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, REG_WRITE 777 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, REG_WRITE 783 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE6, REG_WRITE 792 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, REG_WRITE 798 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, REG_WRITE 804 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, REG_WRITE 814 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, REG_WRITE 826 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, REG_WRITE 840 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, REG_WRITE 844 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER); REG_WRITE 861 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_SWITCH_COM, le32_to_cpu(pModal->antCtrlCommon)); REG_WRITE 866 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, REG_WRITE 869 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, REG_WRITE 905 drivers/net/wireless/ath/ath9k/eeprom_9287.c REG_WRITE(ah, AR_PHY_RF_CTL4, REG_WRITE 479 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_SWITCH_COM, antCtrlCommon & 0xffff); REG_WRITE 492 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset, REG_WRITE 495 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset, REG_WRITE 567 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_RF_CTL4, REG_WRITE 873 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, REG_WRITE 880 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, REG_WRITE 896 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, regOffset, reg32); REG_WRITE 1194 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, REG_WRITE 1199 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE2, REG_WRITE 1208 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, REG_WRITE 1213 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, REG_WRITE 1219 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE3, REG_WRITE 1224 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE4, REG_WRITE 1232 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE5, REG_WRITE 1237 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE6, REG_WRITE 1244 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE7, REG_WRITE 1253 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE8, REG_WRITE 1263 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, REG_WRITE 1269 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE9, REG_WRITE 1277 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_SUB, REG_WRITE 1288 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, REG_WRITE 1292 drivers/net/wireless/ath/ath9k/eeprom_def.c REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER); REG_WRITE 501 drivers/net/wireless/ath/ath9k/htc_drv_init.c REG_WRITE(ah, reg_offset, val); REG_WRITE 118 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, INI_RA(array, r, 0), REG_WRITE 331 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x9248fc00); REG_WRITE 332 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x24924924); REG_WRITE 333 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x28000029); REG_WRITE 334 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x57160824); REG_WRITE 335 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x25980579); REG_WRITE 336 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x00000000); REG_WRITE 337 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x1aaabe40); REG_WRITE 338 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0xbe105554); REG_WRITE 339 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES, 0x000e1007); REG_WRITE 341 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000); REG_WRITE 368 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, addr, wrData); REG_WRITE 379 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, addr, wrData); REG_WRITE 388 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, regAddr[i], regHold[i]); REG_WRITE 622 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_WA, ah->WARegVal); REG_WRITE 719 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_MIC_QOS_CONTROL, 0x100aa); REG_WRITE 720 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_MIC_QOS_SELECT, 0x3210); REG_WRITE 722 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_QOS_NO_ACK, REG_WRITE 727 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TXOP_X, AR_TXOP_X_VAL); REG_WRITE 728 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TXOP_0_3, 0xFFFFFFFF); REG_WRITE 729 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TXOP_4_7, 0xFFFFFFFF); REG_WRITE 730 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TXOP_8_11, 0xFFFFFFFF); REG_WRITE 731 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF); REG_WRITE 812 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_CH0_DDR_DPLL2, ddr_dpll2); REG_WRITE 818 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_PLL_CONTROL, REG_WRITE 823 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_PLL_CONTROL2, pll_control2); REG_WRITE 836 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_PLL_CONTROL, REG_WRITE 872 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PHY_PLL_MODE, regval); REG_WRITE 875 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PHY_PLL_CONTROL, (refdiv << 27) | REG_WRITE 901 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PHY_PLL_MODE, regval); REG_WRITE 904 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PHY_PLL_MODE, REG_WRITE 907 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PHY_PLL_MODE, REG_WRITE 915 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll); REG_WRITE 924 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, 0x50040, 0x304); REG_WRITE 929 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK); REG_WRITE 976 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_IMR, imr_reg); REG_WRITE 978 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg); REG_WRITE 984 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTCFG, msi_cfg); REG_WRITE 991 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTR_SYNC_CAUSE, 0xFFFFFFFF); REG_WRITE 992 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTR_SYNC_ENABLE, sync_default); REG_WRITE 993 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTR_SYNC_MASK, 0); REG_WRITE 999 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE, 0); REG_WRITE 1000 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTR_PRIO_ASYNC_MASK, 0); REG_WRITE 1001 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTR_PRIO_SYNC_ENABLE, 0); REG_WRITE 1002 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTR_PRIO_SYNC_MASK, 0); REG_WRITE 1010 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_D_GBL_IFS_SIFS, val); REG_WRITE 1017 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_D_GBL_IFS_SLOT, val); REG_WRITE 1148 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_D_GBL_IFS_EIFS, ath9k_hw_mac_to_clks(ah, eifs)); REG_WRITE 1231 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RXFIFO_CFG, 0x200); REG_WRITE 1259 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PCU_TXBUF_CTRL, txbuf_size); REG_WRITE 1345 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_RESET, 1); REG_WRITE 1365 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_WA, ah->WARegVal); REG_WRITE 1369 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN | REG_WRITE 1385 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0); REG_WRITE 1390 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RC, val); REG_WRITE 1393 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RC, AR_RC_AHB); REG_WRITE 1418 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_RC, rst_flags); REG_WRITE 1429 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_RC, 0); REG_WRITE 1436 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RC, 0); REG_WRITE 1449 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_WA, ah->WARegVal); REG_WRITE 1453 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN | REG_WRITE 1457 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RC, AR_RC_AHB); REG_WRITE 1459 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_RESET, 0); REG_WRITE 1466 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RC, 0); REG_WRITE 1468 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_RESET, 1); REG_WRITE 1487 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_WA, ah->WARegVal); REG_WRITE 1491 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_FORCE_WAKE, REG_WRITE 1637 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_NAV, 0); REG_WRITE 1721 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_DEF_ANTENNA, saveDefAntenna); REG_WRITE 1723 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_ISR, ~0); REG_WRITE 1724 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); REG_WRITE 1738 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_DQCUMASK(i), 1 << i); REG_WRITE 1762 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_CFG, mask); REG_WRITE 1770 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_CFG, AR_CFG_SWRB | AR_CFG_SWTB); REG_WRITE 1772 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD); REG_WRITE 1780 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD); REG_WRITE 1935 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, REG_WRITE 1949 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, REG_WRITE 2022 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_OBS, 8); REG_WRITE 2051 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_CFG_LED, saveLedState | AR_CFG_SCLK_32KHZ); REG_WRITE 2108 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_MCI_INTERRUPT_RX_MSG_EN, 0); REG_WRITE 2122 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF); REG_WRITE 2132 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); REG_WRITE 2148 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RTC_FORCE_WAKE, REG_WRITE 2176 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_WA, ah->WARegVal & ~AR_WA_D3_L1_DISABLE); REG_WRITE 2186 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_WA, ah->WARegVal); REG_WRITE 2299 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_NEXT_TBTT_TIMER, next_beacon); REG_WRITE 2300 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, next_beacon - REG_WRITE 2302 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_NEXT_SWBA, next_beacon - REG_WRITE 2314 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_BEACON_PERIOD, beacon_period); REG_WRITE 2315 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_DMA_BEACON_PERIOD, beacon_period); REG_WRITE 2316 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_SWBA_PERIOD, beacon_period); REG_WRITE 2333 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_NEXT_TBTT_TIMER, bs->bs_nexttbtt); REG_WRITE 2334 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_BEACON_PERIOD, bs->bs_intval); REG_WRITE 2335 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_DMA_BEACON_PERIOD, bs->bs_intval); REG_WRITE 2363 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_NEXT_DTIM, bs->bs_nextdtim - SLEEP_SLOP); REG_WRITE 2364 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_NEXT_TIM, nextTbtt - SLEEP_SLOP); REG_WRITE 2366 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_SLEEP1, REG_WRITE 2375 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_SLEEP2, REG_WRITE 2378 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TIM_PERIOD, beaconintval); REG_WRITE 2379 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_DTIM_PERIOD, dtimperiod); REG_WRITE 2388 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold); REG_WRITE 2724 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, addr, tmp); REG_WRITE 2869 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_DEF_ANTENNA, (antenna & 0x7)); REG_WRITE 2897 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RX_FILTER, bits); REG_WRITE 2904 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_PHY_ERR, phybits); REG_WRITE 3001 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_MCAST_FIL0, filter0); REG_WRITE 3002 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_MCAST_FIL1, filter1); REG_WRITE 3010 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_BSS_ID0, get_unaligned_le32(common->curbssid)); REG_WRITE 3011 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_BSS_ID1, get_unaligned_le16(common->curbssid + 4) | REG_WRITE 3040 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TSF_L32, tsf64 & 0xffffffff); REG_WRITE 3041 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_TSF_U32, (tsf64 >> 32) & 0xffffffff); REG_WRITE 3052 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE); REG_WRITE 3074 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, AR_2040_MODE, macmode); REG_WRITE 3174 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, gen_tmr_configuration[timer->index].next_addr, REG_WRITE 3176 drivers/net/wireless/ath/ath9k/hw.c REG_WRITE(ah, gen_tmr_configuration[timer->index].period_addr, REG_WRITE 32 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_IMR_S0, REG_WRITE 35 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_IMR_S1, REG_WRITE 41 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg); REG_WRITE 54 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_QTXDP(q), txdp); REG_WRITE 61 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_Q_TXE, 1 << q); REG_WRITE 123 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_TXCFG, REG_WRITE 146 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_Q_TXD, AR_Q_TXD_M); REG_WRITE 166 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_Q_TXD, 0); REG_WRITE 177 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_Q_TXD, 1 << q); REG_WRITE 187 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_Q_TXD, 0); REG_WRITE 390 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_DLCL_IFS(q), REG_WRITE 395 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_DRETRY_LIMIT(q), REG_WRITE 400 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_QMISC(q), AR_Q_MISC_DCU_EARLY_TERM_REQ); REG_WRITE 403 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_DMISC(q), REG_WRITE 406 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_DMISC(q), REG_WRITE 410 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_QCBRCFG(q), REG_WRITE 418 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_QRDYTIMECFG(q), REG_WRITE 423 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_DCHNTIME(q), REG_WRITE 463 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_DLCL_IFS(q), SM(0, AR_D_LCL_IFS_CWMIN) REG_WRITE 478 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_QRDYTIMECFG(q), REG_WRITE 505 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_Q_DESC_CRCCHK, AR_Q_DESC_CRCCHK_EN); REG_WRITE 671 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_RXDP, rxdp); REG_WRITE 701 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_MACMISC, REG_WRITE 706 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_CR, AR_CR_RXD); REG_WRITE 786 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_IER, AR_IER_DISABLE); REG_WRITE 789 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, 0); REG_WRITE 792 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_SYNC_ENABLE, 0); REG_WRITE 825 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_IER, AR_IER_ENABLE); REG_WRITE 827 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, async_mask); REG_WRITE 828 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_ASYNC_MASK, async_mask); REG_WRITE 830 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_SYNC_ENABLE, sync_default); REG_WRITE 831 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_SYNC_MASK, sync_default); REG_WRITE 844 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE, ah->msi_mask); REG_WRITE 845 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_PRIO_ASYNC_MASK, ah->msi_mask); REG_WRITE 860 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_PCIE_MSI, REG_WRITE 921 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE, 0); REG_WRITE 999 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_IMR, mask); REG_WRITE 1015 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg); REG_WRITE 1045 drivers/net/wireless/ath/ath9k/mac.c REG_WRITE(ah, AR_D_TXBLK_BASE, filter); REG_WRITE 123 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr)); REG_WRITE 126 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_STA_ID1, id1); REG_WRITE 128 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask)); REG_WRITE 129 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4)); REG_WRITE 148 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC); REG_WRITE 157 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_CCCNT, 0); REG_WRITE 158 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_RFCNT, 0); REG_WRITE 159 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_RCCNT, 0); REG_WRITE 160 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_TFCNT, 0); REG_WRITE 163 drivers/net/wireless/ath/hw.c REG_WRITE(ah, AR_MIBC, 0); REG_WRITE 57 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); REG_WRITE 58 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); REG_WRITE 59 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); REG_WRITE 60 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0); REG_WRITE 61 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0); REG_WRITE 62 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), AR_KEYTABLE_TYPE_CLR); REG_WRITE 63 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0); REG_WRITE 64 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0); REG_WRITE 69 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), 0); REG_WRITE 70 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0); REG_WRITE 71 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), 0); REG_WRITE 72 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0); REG_WRITE 74 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0); REG_WRITE 75 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), REG_WRITE 121 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo); REG_WRITE 122 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), macHi | unicast_flag); REG_WRITE 208 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), ~key0); REG_WRITE 209 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), ~key1); REG_WRITE 212 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2); REG_WRITE 213 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3); REG_WRITE 216 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4); REG_WRITE 217 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType); REG_WRITE 246 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0); REG_WRITE 247 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), mic1); REG_WRITE 250 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2); REG_WRITE 251 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), mic3); REG_WRITE 254 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), mic4); REG_WRITE 255 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), REG_WRITE 285 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY0(micentry), mic0); REG_WRITE 286 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY1(micentry), 0); REG_WRITE 289 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY2(micentry), mic2); REG_WRITE 290 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY3(micentry), 0); REG_WRITE 293 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY4(micentry), 0); REG_WRITE 294 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_TYPE(micentry), REG_WRITE 303 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_MAC0(micentry), 0); REG_WRITE 304 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_MAC1(micentry), 0); REG_WRITE 311 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0); REG_WRITE 312 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1); REG_WRITE 319 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0); REG_WRITE 320 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1); REG_WRITE 323 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2); REG_WRITE 324 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3); REG_WRITE 327 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4); REG_WRITE 328 drivers/net/wireless/ath/key.c REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType); REG_WRITE 132 drivers/net/wireless/st/cw1200/fwio.c REG_WRITE(ST90TDS_SRAM_BASE_ADDR_REG_ID, 0xFFF20000); REG_WRITE 133 drivers/net/wireless/st/cw1200/fwio.c REG_WRITE(ST90TDS_AHB_DPORT_REG_ID, 0xEAFFFFFE); REG_WRITE 138 drivers/net/wireless/st/cw1200/fwio.c REG_WRITE(ST90TDS_CONFIG_REG_ID, val32); REG_WRITE 142 drivers/net/wireless/st/cw1200/fwio.c REG_WRITE(ST90TDS_CONFIG_REG_ID, val32);